JPS579154A - Malfunction preventing system for fsk communication - Google Patents
Malfunction preventing system for fsk communicationInfo
- Publication number
- JPS579154A JPS579154A JP8323480A JP8323480A JPS579154A JP S579154 A JPS579154 A JP S579154A JP 8323480 A JP8323480 A JP 8323480A JP 8323480 A JP8323480 A JP 8323480A JP S579154 A JPS579154 A JP S579154A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- post
- signal
- carriers
- noise
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
- H04L27/14—Demodulator circuits; Receiver circuits
- H04L27/156—Demodulator circuits; Receiver circuits with demodulation using temporal properties of the received signal, e.g. detecting pulse width
- H04L27/1563—Demodulator circuits; Receiver circuits with demodulation using temporal properties of the received signal, e.g. detecting pulse width using transition or level detection
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
PURPOSE:To prevent the malfunction due to noise, by adding the front and post carriers to a FSK signal, and switching the gate of AND circuits within the present period of the front and post carriers. CONSTITUTION:An FSK signal added with front and post carriers is applied to a zero crossing amplifier circuit 2, comparators 3, 4, integrator 6, comparator 7, and FF10 via a BPF1. When the FF10 is set, the output of the circuit 2 is applied to a demodulator 12 and a logical processing circuit 13. The circuit 13 outputs a reception confirming signal g and resets the FF10 after the processing time. The signal g is the timing signal before the stop of the post carrier, but since the FF10 has the priority for reset, an AND circuit 11 is closed. Thus, the malfunction due to noise after the stop of the post carrier can be prevented.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8323480A JPS579154A (en) | 1980-06-19 | 1980-06-19 | Malfunction preventing system for fsk communication |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8323480A JPS579154A (en) | 1980-06-19 | 1980-06-19 | Malfunction preventing system for fsk communication |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS579154A true JPS579154A (en) | 1982-01-18 |
Family
ID=13796628
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8323480A Pending JPS579154A (en) | 1980-06-19 | 1980-06-19 | Malfunction preventing system for fsk communication |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS579154A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0715439A3 (en) * | 1994-12-01 | 1997-11-19 | Nec Corporation | Decision device for burst-mode receiver |
-
1980
- 1980-06-19 JP JP8323480A patent/JPS579154A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0715439A3 (en) * | 1994-12-01 | 1997-11-19 | Nec Corporation | Decision device for burst-mode receiver |
US5838731A (en) * | 1994-12-01 | 1998-11-17 | Nec Corporation | Burst-mode digital receiver |
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