JPS5789127A - Controlling system for input-output instruction - Google Patents

Controlling system for input-output instruction

Info

Publication number
JPS5789127A
JPS5789127A JP16607880A JP16607880A JPS5789127A JP S5789127 A JPS5789127 A JP S5789127A JP 16607880 A JP16607880 A JP 16607880A JP 16607880 A JP16607880 A JP 16607880A JP S5789127 A JPS5789127 A JP S5789127A
Authority
JP
Japan
Prior art keywords
initiation
input
waiting matrix
waiting
matrix
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16607880A
Other languages
English (en)
Inventor
Hajime Takagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP16607880A priority Critical patent/JPS5789127A/ja
Publication of JPS5789127A publication Critical patent/JPS5789127A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
JP16607880A 1980-11-25 1980-11-25 Controlling system for input-output instruction Pending JPS5789127A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16607880A JPS5789127A (en) 1980-11-25 1980-11-25 Controlling system for input-output instruction

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16607880A JPS5789127A (en) 1980-11-25 1980-11-25 Controlling system for input-output instruction

Publications (1)

Publication Number Publication Date
JPS5789127A true JPS5789127A (en) 1982-06-03

Family

ID=15824566

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16607880A Pending JPS5789127A (en) 1980-11-25 1980-11-25 Controlling system for input-output instruction

Country Status (1)

Country Link
JP (1) JPS5789127A (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5963836A (ja) * 1982-10-04 1984-04-11 Hitachi Ltd 通信制御処理装置の制御方式
JPS62256065A (ja) * 1986-04-30 1987-11-07 Toshiba Corp 要求バツフア制御方式
JPS62256153A (ja) * 1986-04-30 1987-11-07 Fujitsu Ltd パス選択方式

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5963836A (ja) * 1982-10-04 1984-04-11 Hitachi Ltd 通信制御処理装置の制御方式
JPS62256065A (ja) * 1986-04-30 1987-11-07 Toshiba Corp 要求バツフア制御方式
JPS62256153A (ja) * 1986-04-30 1987-11-07 Fujitsu Ltd パス選択方式
JPH0525133B2 (ja) * 1986-04-30 1993-04-12 Tokyo Shibaura Electric Co
JPH0566625B2 (ja) * 1986-04-30 1993-09-22 Fujitsu Ltd

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