JPS5786933A - Communication controlling system between computers - Google Patents
Communication controlling system between computersInfo
- Publication number
- JPS5786933A JPS5786933A JP55161896A JP16189680A JPS5786933A JP S5786933 A JPS5786933 A JP S5786933A JP 55161896 A JP55161896 A JP 55161896A JP 16189680 A JP16189680 A JP 16189680A JP S5786933 A JPS5786933 A JP S5786933A
- Authority
- JP
- Japan
- Prior art keywords
- subordinate
- equipment
- data
- telegraphic message
- computer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer And Data Communications (AREA)
- Maintenance And Management Of Digital Transmission (AREA)
- Retry When Errors Occur (AREA)
Abstract
PURPOSE:To restart a subordinate computer by transmitting special data from a host computer which detects a system fault of the subordinate computer to the subordinate computer and by processing fault analytic data from the subordinate computer. CONSTITUTION:A host equipment 1, once detecting a fault of a subordite equipment 5, transmits a special telegraphic message to the subordinate equipment 5. On receiving the telegraphic message, the communication controller 4 of the subordinate equipment 5 interrupts a processor 6 and sets telegraphic message data in an interface register 12. As a result of this interruption, the processor 6 is placed in a state RUM and an ROM to be started is determined. When the telegraphic message data is the storage contents transmission request of the subordinate equipment 5, the contents of a main storage and an auxiliary storage are all sent to the host equipment 1, which while storing the software of the subordinate equipment 5, collates the data, thereby analyzing the fault. When the telegraphic message data is a request to transmit normal data from the host equipment 1, the subordinate equipment 5 receives the normal data to return to the writing operation of the main storage and auxiliary storage automatically.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55161896A JPS5786933A (en) | 1980-11-19 | 1980-11-19 | Communication controlling system between computers |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55161896A JPS5786933A (en) | 1980-11-19 | 1980-11-19 | Communication controlling system between computers |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5786933A true JPS5786933A (en) | 1982-05-31 |
Family
ID=15744061
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55161896A Pending JPS5786933A (en) | 1980-11-19 | 1980-11-19 | Communication controlling system between computers |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5786933A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5952350A (en) * | 1982-08-27 | 1984-03-26 | Fujitsu Ltd | Restarting system of processor |
JPS60126743A (en) * | 1983-12-13 | 1985-07-06 | Fuji Facom Corp | Processing restart control system |
-
1980
- 1980-11-19 JP JP55161896A patent/JPS5786933A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5952350A (en) * | 1982-08-27 | 1984-03-26 | Fujitsu Ltd | Restarting system of processor |
JPS60126743A (en) * | 1983-12-13 | 1985-07-06 | Fuji Facom Corp | Processing restart control system |
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