JPS5769984A - Scramble system for television signal - Google Patents
Scramble system for television signalInfo
- Publication number
- JPS5769984A JPS5769984A JP55147412A JP14741280A JPS5769984A JP S5769984 A JPS5769984 A JP S5769984A JP 55147412 A JP55147412 A JP 55147412A JP 14741280 A JP14741280 A JP 14741280A JP S5769984 A JPS5769984 A JP S5769984A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- synchronizing
- inputted
- key
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/16—Analogue secrecy systems; Analogue subscription systems
- H04N7/167—Systems rendering the television signal unintelligible and subsequently intelligible
- H04N7/171—Systems operating in the amplitude domain of the television signal
Abstract
PURPOSE:To give high encryption, by performing scramble processing for the level of a TV signal with a control signal in a toll TV broadcast, and transmitting a key signal synchronizing with this control signal through superimposing on the audio signal by means of subcarrier. CONSTITUTION:A normal synthesized video signal CV1 is inputted to a pedestal clamp circuit 21, the synchronizing signal is made constant and a signal CV2 is obtained and branched into three ways, one is applied to a signal selector 23 and another is inputted to a level shift circuit 22, the level is lowered and the signal CV3 is obtained and applied to the switch 23, the remaining one is applied to a synchronizing signal detection circuit 25 to detect the synchronizing signal. This synchronizing signal is inputted to a control signal generating circuit 26 and a virtual synchronizing signal generating circuit 27, a control signal CS from the circuit 26 is applied to the switch 23, two synthersized signals CV2, CV3 are switched alternately, the output CV4 is mixed at a mixer 28 with the virtual synchronizing signal from a circuit 27 to form a scramble processing synthesized video signal CV5 and transmitted to a video transmitter 1. The signal CS is a key signal at a key signal generating circuit 29 to be superimposed on the audio signal for transmission.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55147412A JPS5769984A (en) | 1980-10-21 | 1980-10-21 | Scramble system for television signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55147412A JPS5769984A (en) | 1980-10-21 | 1980-10-21 | Scramble system for television signal |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5769984A true JPS5769984A (en) | 1982-04-30 |
JPS625554B2 JPS625554B2 (en) | 1987-02-05 |
Family
ID=15429709
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55147412A Granted JPS5769984A (en) | 1980-10-21 | 1980-10-21 | Scramble system for television signal |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5769984A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0221739A2 (en) * | 1985-10-29 | 1987-05-13 | Payview Limited | Video scrambling systems |
-
1980
- 1980-10-21 JP JP55147412A patent/JPS5769984A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0221739A2 (en) * | 1985-10-29 | 1987-05-13 | Payview Limited | Video scrambling systems |
Also Published As
Publication number | Publication date |
---|---|
JPS625554B2 (en) | 1987-02-05 |
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