JPS5759448U - - Google Patents
Info
- Publication number
- JPS5759448U JPS5759448U JP1980135970U JP13597080U JPS5759448U JP S5759448 U JPS5759448 U JP S5759448U JP 1980135970 U JP1980135970 U JP 1980135970U JP 13597080 U JP13597080 U JP 13597080U JP S5759448 U JPS5759448 U JP S5759448U
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1980135970U JPS6127178Y2 (cs) | 1980-09-26 | 1980-09-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1980135970U JPS6127178Y2 (cs) | 1980-09-26 | 1980-09-26 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5759448U true JPS5759448U (cs) | 1982-04-08 |
| JPS6127178Y2 JPS6127178Y2 (cs) | 1986-08-13 |
Family
ID=29496112
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1980135970U Expired JPS6127178Y2 (cs) | 1980-09-26 | 1980-09-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6127178Y2 (cs) |
-
1980
- 1980-09-26 JP JP1980135970U patent/JPS6127178Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6127178Y2 (cs) | 1986-08-13 |