JPS57501002A - - Google Patents
Info
- Publication number
- JPS57501002A JPS57501002A JP50226380A JP50226380A JPS57501002A JP S57501002 A JPS57501002 A JP S57501002A JP 50226380 A JP50226380 A JP 50226380A JP 50226380 A JP50226380 A JP 50226380A JP S57501002 A JPS57501002 A JP S57501002A
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/418—Address circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/US1980/000670 WO1981003573A1 (fr) | 1980-06-02 | 1980-06-02 | Circuit decodeur pour memoire a semi-conducteur |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57501002A true JPS57501002A (fr) | 1982-06-03 |
Family
ID=22154378
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP50226380A Pending JPS57501002A (fr) | 1980-06-02 | 1980-06-02 |
Country Status (3)
| Country | Link |
|---|---|
| EP (1) | EP0056366A4 (fr) |
| JP (1) | JPS57501002A (fr) |
| WO (1) | WO1981003573A1 (fr) |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3702926A (en) * | 1970-09-30 | 1972-11-14 | Ibm | Fet decode circuit |
| US4074237A (en) * | 1976-03-08 | 1978-02-14 | International Business Machines Corporation | Word line clamping circuit and decoder |
| US4081701A (en) * | 1976-06-01 | 1978-03-28 | Texas Instruments Incorporated | High speed sense amplifier for MOS random access memory |
| JPS5348423A (en) * | 1976-10-15 | 1978-05-01 | Hitachi Ltd | Address decoder |
| US4082966A (en) * | 1976-12-27 | 1978-04-04 | Texas Instruments Incorporated | Mos detector or sensing circuit |
| US4200917A (en) * | 1979-03-12 | 1980-04-29 | Motorola, Inc. | Quiet column decoder |
-
1980
- 1980-06-02 JP JP50226380A patent/JPS57501002A/ja active Pending
- 1980-06-02 EP EP19800901908 patent/EP0056366A4/fr not_active Withdrawn
- 1980-06-02 WO PCT/US1980/000670 patent/WO1981003573A1/fr not_active Application Discontinuation
Also Published As
| Publication number | Publication date |
|---|---|
| EP0056366A4 (fr) | 1984-09-13 |
| EP0056366A1 (fr) | 1982-07-28 |
| WO1981003573A1 (fr) | 1981-12-10 |