JPS5745764A - Reference carrier reproducing circuit - Google Patents

Reference carrier reproducing circuit

Info

Publication number
JPS5745764A
JPS5745764A JP55120457A JP12045780A JPS5745764A JP S5745764 A JPS5745764 A JP S5745764A JP 55120457 A JP55120457 A JP 55120457A JP 12045780 A JP12045780 A JP 12045780A JP S5745764 A JPS5745764 A JP S5745764A
Authority
JP
Japan
Prior art keywords
signal
reference carrier
threshold value
comparators
outputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55120457A
Other languages
Japanese (ja)
Inventor
Koichiro Takeda
Takayuki Ozaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55120457A priority Critical patent/JPS5745764A/en
Publication of JPS5745764A publication Critical patent/JPS5745764A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/18Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22Demodulator circuits; Receiver circuits
    • H04L27/227Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2271Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals
    • H04L27/2273Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals associated with quadrature demodulation, e.g. Costas loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To achieve reference carrier reproduction simply, by providing a logical circuit selecting a signal showing a phase error according to an incoming signal, in a reference carrier reproducing circuit obtaining a reference carrier to synchronizingly detect a wave to be modulated. CONSTITUTION:Y component of a signal from a phase detector PDY is inputted to one of comparator 1-4, and X component from a phase detector PDX is inputted to another of the comparators 1-4 via coefficient devices 9-12. Eight signal points are identified for an input signal, by setting a threshold value on the line of Y= ¦tan22.5X¦ as shown in Fig. (a) through the use of the coefficient devices 9-12. In this case, if the input signal is at an upper region than the threshold value, ''1'' is outputted and if it is under the threshold value, ''0'' is outputted. As a result, through the combination of outputs of the comparators 1-4, it is known that in which area the signal point is located. Thus, even if in-phase detection is used, no noise margin is decreased and digital operation by integrated circuits is made possible.
JP55120457A 1980-08-30 1980-08-30 Reference carrier reproducing circuit Pending JPS5745764A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55120457A JPS5745764A (en) 1980-08-30 1980-08-30 Reference carrier reproducing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55120457A JPS5745764A (en) 1980-08-30 1980-08-30 Reference carrier reproducing circuit

Publications (1)

Publication Number Publication Date
JPS5745764A true JPS5745764A (en) 1982-03-15

Family

ID=14786643

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55120457A Pending JPS5745764A (en) 1980-08-30 1980-08-30 Reference carrier reproducing circuit

Country Status (1)

Country Link
JP (1) JPS5745764A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0335284A2 (en) * 1988-03-31 1989-10-04 Daimler-Benz Aerospace Aktiengesellschaft Phase to digital conversion method and arrangement for carrying out the method
JPH03262235A (en) * 1990-03-13 1991-11-21 Fujitsu Ltd Psk demodulation circuit
JPH04292041A (en) * 1991-03-20 1992-10-16 Fujitsu Ltd Carrier control signal generation circuit in eight-phase demodulator

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0335284A2 (en) * 1988-03-31 1989-10-04 Daimler-Benz Aerospace Aktiengesellschaft Phase to digital conversion method and arrangement for carrying out the method
JPH03262235A (en) * 1990-03-13 1991-11-21 Fujitsu Ltd Psk demodulation circuit
JPH04292041A (en) * 1991-03-20 1992-10-16 Fujitsu Ltd Carrier control signal generation circuit in eight-phase demodulator

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