JPS5745763A - Cmi decoding circuit - Google Patents

Cmi decoding circuit

Info

Publication number
JPS5745763A
JPS5745763A JP12075980A JP12075980A JPS5745763A JP S5745763 A JPS5745763 A JP S5745763A JP 12075980 A JP12075980 A JP 12075980A JP 12075980 A JP12075980 A JP 12075980A JP S5745763 A JPS5745763 A JP S5745763A
Authority
JP
Japan
Prior art keywords
code
code train
train
clock
zero return
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12075980A
Other languages
Japanese (ja)
Inventor
Koji Nishizaki
Masanori Arai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP12075980A priority Critical patent/JPS5745763A/en
Publication of JPS5745763A publication Critical patent/JPS5745763A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
    • H04L25/4908—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes
    • H04L25/491—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes using 1B2B codes
    • H04L25/4912—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes using 1B2B codes using CMI or 2-HDB-3 code

Landscapes

  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE:To decode non-zero return data surely within each period of non-zero return code train, by converting a code mark transposition code train into the non- zero return code train, retiming its output with the clock of a code mark transposition code train and picking up the original binary data. CONSTITUTION:A conversion circuit CONV1 converts the received code mark transposition CMI code train (a) into a zero return code train (h) without using a clock. This code train h is converted into a non-zero return NRZ code train (i) without using the clock by means of a conversion circuit CONV2. The code train (i) is subjected to retiming via a clock with a DFF. The objective of retiming is an NRZ code train (i) in which the entire period is effective, and when the leading of the clock is set to the center of the clock period of the code train (i), a margin of a half period before and after the train is obtained, and the NRZ data is decoded surely.
JP12075980A 1980-09-01 1980-09-01 Cmi decoding circuit Pending JPS5745763A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12075980A JPS5745763A (en) 1980-09-01 1980-09-01 Cmi decoding circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12075980A JPS5745763A (en) 1980-09-01 1980-09-01 Cmi decoding circuit

Publications (1)

Publication Number Publication Date
JPS5745763A true JPS5745763A (en) 1982-03-15

Family

ID=14794283

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12075980A Pending JPS5745763A (en) 1980-09-01 1980-09-01 Cmi decoding circuit

Country Status (1)

Country Link
JP (1) JPS5745763A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0111309A2 (en) * 1982-12-10 1984-06-20 Siemens Aktiengesellschaft CMI decoder
EP0115327A2 (en) * 1983-01-27 1984-08-08 Siemens Aktiengesellschaft CMI-decoder
JPS60180949A (en) * 1984-02-29 1985-09-14 日瀝化学工業株式会社 Cement bitumen formed matter for pavement

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0111309A2 (en) * 1982-12-10 1984-06-20 Siemens Aktiengesellschaft CMI decoder
EP0115327A2 (en) * 1983-01-27 1984-08-08 Siemens Aktiengesellschaft CMI-decoder
JPS60180949A (en) * 1984-02-29 1985-09-14 日瀝化学工業株式会社 Cement bitumen formed matter for pavement

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