JPS5744556U - - Google Patents

Info

Publication number
JPS5744556U
JPS5744556U JP1980004152U JP415280U JPS5744556U JP S5744556 U JPS5744556 U JP S5744556U JP 1980004152 U JP1980004152 U JP 1980004152U JP 415280 U JP415280 U JP 415280U JP S5744556 U JPS5744556 U JP S5744556U
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1980004152U
Other languages
Japanese (ja)
Other versions
JPS6214705Y2 (en:Method
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1980004152U priority Critical patent/JPS6214705Y2/ja
Publication of JPS5744556U publication Critical patent/JPS5744556U/ja
Application granted granted Critical
Publication of JPS6214705Y2 publication Critical patent/JPS6214705Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
JP1980004152U 1980-01-17 1980-01-17 Expired JPS6214705Y2 (en:Method)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1980004152U JPS6214705Y2 (en:Method) 1980-01-17 1980-01-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1980004152U JPS6214705Y2 (en:Method) 1980-01-17 1980-01-17

Publications (2)

Publication Number Publication Date
JPS5744556U true JPS5744556U (en:Method) 1982-03-11
JPS6214705Y2 JPS6214705Y2 (en:Method) 1987-04-15

Family

ID=29434483

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1980004152U Expired JPS6214705Y2 (en:Method) 1980-01-17 1980-01-17

Country Status (1)

Country Link
JP (1) JPS6214705Y2 (en:Method)

Also Published As

Publication number Publication date
JPS6214705Y2 (en:Method) 1987-04-15

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