JPS5742205Y2 - - Google Patents
Info
- Publication number
- JPS5742205Y2 JPS5742205Y2 JP1977058589U JP5858977U JPS5742205Y2 JP S5742205 Y2 JPS5742205 Y2 JP S5742205Y2 JP 1977058589 U JP1977058589 U JP 1977058589U JP 5858977 U JP5858977 U JP 5858977U JP S5742205 Y2 JPS5742205 Y2 JP S5742205Y2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Insertion, Bundling And Securing Of Wires For Electric Apparatuses (AREA)
- Mounting Of Printed Circuit Boards And The Like (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1977058589U JPS5742205Y2 (en:Method) | 1977-05-11 | 1977-05-11 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1977058589U JPS5742205Y2 (en:Method) | 1977-05-11 | 1977-05-11 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS53153469U JPS53153469U (en:Method) | 1978-12-02 |
| JPS5742205Y2 true JPS5742205Y2 (en:Method) | 1982-09-17 |
Family
ID=28957541
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1977058589U Expired JPS5742205Y2 (en:Method) | 1977-05-11 | 1977-05-11 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5742205Y2 (en:Method) |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS541541Y2 (en:Method) * | 1973-10-18 | 1979-01-24 |
-
1977
- 1977-05-11 JP JP1977058589U patent/JPS5742205Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS53153469U (en:Method) | 1978-12-02 |