JPS5740680A - Electronic watch circuit - Google Patents

Electronic watch circuit

Info

Publication number
JPS5740680A
JPS5740680A JP55117452A JP11745280A JPS5740680A JP S5740680 A JPS5740680 A JP S5740680A JP 55117452 A JP55117452 A JP 55117452A JP 11745280 A JP11745280 A JP 11745280A JP S5740680 A JPS5740680 A JP S5740680A
Authority
JP
Japan
Prior art keywords
melody
circuit
control
clock
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55117452A
Other languages
Japanese (ja)
Inventor
Toshimasa Yoshinami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
SHIMAUCHI SEIKI KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
SHIMAUCHI SEIKI KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK, SHIMAUCHI SEIKI KK filed Critical Seiko Epson Corp
Priority to JP55117452A priority Critical patent/JPS5740680A/en
Publication of JPS5740680A publication Critical patent/JPS5740680A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G04—HOROLOGY
    • G04G—ELECTRONIC TIME-PIECES
    • G04G13/00—Producing acoustic time signals

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Clocks (AREA)

Abstract

PURPOSE:To produce an accurate melody sound through the prevention of the unstability of clock for melody control, by a method wherein, during the operation of an audio device in an electronic clock, a time regulating circuit is brought into a prohibitation state. CONSTITUTION:With a melody start signal 149 applied, a control output of a melody control circuit 124 is inverted, and AND gates 115-117 are controlled. This shuts off an output of a theoretical regulating data setting circuit 120 which is substantially brought into a prohibition state. Division FF104 and 105 are not controlled by the circuit 120, and a stable dividing output devoide of change is generated. The stable dividing outputs of the FF104 and 105 are applied to the circuit 124 to prevent the unstabilization or a clock for melody control, and an accurate melody sound can always be produced.
JP55117452A 1980-08-26 1980-08-26 Electronic watch circuit Pending JPS5740680A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55117452A JPS5740680A (en) 1980-08-26 1980-08-26 Electronic watch circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55117452A JPS5740680A (en) 1980-08-26 1980-08-26 Electronic watch circuit

Publications (1)

Publication Number Publication Date
JPS5740680A true JPS5740680A (en) 1982-03-06

Family

ID=14711999

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55117452A Pending JPS5740680A (en) 1980-08-26 1980-08-26 Electronic watch circuit

Country Status (1)

Country Link
JP (1) JPS5740680A (en)

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