JPS5735051U - - Google Patents
Info
- Publication number
- JPS5735051U JPS5735051U JP1980111208U JP11120880U JPS5735051U JP S5735051 U JPS5735051 U JP S5735051U JP 1980111208 U JP1980111208 U JP 1980111208U JP 11120880 U JP11120880 U JP 11120880U JP S5735051 U JPS5735051 U JP S5735051U
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1980111208U JPS5735051U (enrdf_load_stackoverflow) | 1980-08-07 | 1980-08-07 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1980111208U JPS5735051U (enrdf_load_stackoverflow) | 1980-08-07 | 1980-08-07 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5735051U true JPS5735051U (enrdf_load_stackoverflow) | 1982-02-24 |
Family
ID=29472324
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1980111208U Pending JPS5735051U (enrdf_load_stackoverflow) | 1980-08-07 | 1980-08-07 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5735051U (enrdf_load_stackoverflow) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5038445B1 (enrdf_load_stackoverflow) * | 1970-04-23 | 1975-12-10 | ||
JPS54133878A (en) * | 1978-04-07 | 1979-10-17 | Nec Corp | Semiconductor device |
-
1980
- 1980-08-07 JP JP1980111208U patent/JPS5735051U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5038445B1 (enrdf_load_stackoverflow) * | 1970-04-23 | 1975-12-10 | ||
JPS54133878A (en) * | 1978-04-07 | 1979-10-17 | Nec Corp | Semiconductor device |