JPS5727622B2 - - Google Patents
Info
- Publication number
- JPS5727622B2 JPS5727622B2 JP7360972A JP7360972A JPS5727622B2 JP S5727622 B2 JPS5727622 B2 JP S5727622B2 JP 7360972 A JP7360972 A JP 7360972A JP 7360972 A JP7360972 A JP 7360972A JP S5727622 B2 JPS5727622 B2 JP S5727622B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Logic Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7360972A JPS5727622B2 (en) | 1972-07-21 | 1972-07-21 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7360972A JPS5727622B2 (en) | 1972-07-21 | 1972-07-21 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS4932577A JPS4932577A (en) | 1974-03-25 |
JPS5727622B2 true JPS5727622B2 (en) | 1982-06-11 |
Family
ID=13523233
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7360972A Expired JPS5727622B2 (en) | 1972-07-21 | 1972-07-21 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5727622B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59173905A (en) * | 1983-03-23 | 1984-10-02 | 財団法人 電力中央研究所 | Method of reducing eddy current loss in power cable |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59117262A (en) * | 1982-12-24 | 1984-07-06 | Oki Electric Ind Co Ltd | Light emitting and receiving device |
US4565976A (en) * | 1983-08-05 | 1986-01-21 | Advanced Micro Devices, Inc. | Interruptable voltage-controlled oscillator and phase-locked loop using same |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3579272A (en) * | 1968-02-16 | 1971-05-18 | Plessey Co Ltd | Logic circuits |
US3590274A (en) * | 1969-07-15 | 1971-06-29 | Fairchild Camera Instr Co | Temperature compensated current-mode logic circuit |
-
1972
- 1972-07-21 JP JP7360972A patent/JPS5727622B2/ja not_active Expired
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3579272A (en) * | 1968-02-16 | 1971-05-18 | Plessey Co Ltd | Logic circuits |
US3590274A (en) * | 1969-07-15 | 1971-06-29 | Fairchild Camera Instr Co | Temperature compensated current-mode logic circuit |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59173905A (en) * | 1983-03-23 | 1984-10-02 | 財団法人 電力中央研究所 | Method of reducing eddy current loss in power cable |
Also Published As
Publication number | Publication date |
---|---|
JPS4932577A (en) | 1974-03-25 |