JPS5727545B2 - - Google Patents

Info

Publication number
JPS5727545B2
JPS5727545B2 JP11146872A JP11146872A JPS5727545B2 JP S5727545 B2 JPS5727545 B2 JP S5727545B2 JP 11146872 A JP11146872 A JP 11146872A JP 11146872 A JP11146872 A JP 11146872A JP S5727545 B2 JPS5727545 B2 JP S5727545B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP11146872A
Other languages
Japanese (ja)
Other versions
JPS4968631A (Direct
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11146872A priority Critical patent/JPS5727545B2/ja
Priority to FR7339386A priority patent/FR2205708B1/fr
Publication of JPS4968631A publication Critical patent/JPS4968631A/ja
Publication of JPS5727545B2 publication Critical patent/JPS5727545B2/ja
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/402—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh
    • G11C11/4023—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh using field effect transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Static Random-Access Memory (AREA)
JP11146872A 1972-11-06 1972-11-06 Expired JPS5727545B2 (Direct)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP11146872A JPS5727545B2 (Direct) 1972-11-06 1972-11-06
FR7339386A FR2205708B1 (Direct) 1972-11-06 1973-11-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11146872A JPS5727545B2 (Direct) 1972-11-06 1972-11-06

Publications (2)

Publication Number Publication Date
JPS4968631A JPS4968631A (Direct) 1974-07-03
JPS5727545B2 true JPS5727545B2 (Direct) 1982-06-11

Family

ID=14561995

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11146872A Expired JPS5727545B2 (Direct) 1972-11-06 1972-11-06

Country Status (2)

Country Link
JP (1) JPS5727545B2 (Direct)
FR (1) FR2205708B1 (Direct)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1502270A (en) * 1974-10-30 1978-03-01 Hitachi Ltd Word line driver circuit in memory circuit
JPS51147224A (en) * 1975-06-13 1976-12-17 Hitachi Ltd Semiconductor memory
JPS5271141A (en) * 1975-12-10 1977-06-14 Hitachi Ltd Word line driving circuit
JPS5493335A (en) * 1977-12-30 1979-07-24 Fujitsu Ltd Decoder circuit
JPS5625291A (en) * 1979-08-07 1981-03-11 Nec Corp Semiconductor circuit
JPS56156985A (en) * 1980-02-04 1981-12-03 Texas Instruments Inc Decoder
JPS6042554B2 (ja) * 1980-12-24 1985-09-24 富士通株式会社 Ｃｍｏｓメモリデコ−ダ回路
US4514829A (en) * 1982-12-30 1985-04-30 International Business Machines Corporation Word line decoder and driver circuits for high density semiconductor memory
JPS6098598A (ja) * 1983-11-01 1985-06-01 Fujitsu Ltd 半導体記憶装置
JPS63171494A (ja) * 1987-02-20 1988-07-15 Toshiba Corp アドレス選択回路
JPS63275099A (ja) * 1987-05-07 1988-11-11 Matsushita Electronics Corp 半導体記憶装置

Also Published As

Publication number Publication date
FR2205708A1 (Direct) 1974-05-31
JPS4968631A (Direct) 1974-07-03
FR2205708B1 (Direct) 1983-09-23

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