JPS5727140Y2 - - Google Patents
Info
- Publication number
- JPS5727140Y2 JPS5727140Y2 JP1977115896U JP11589677U JPS5727140Y2 JP S5727140 Y2 JPS5727140 Y2 JP S5727140Y2 JP 1977115896 U JP1977115896 U JP 1977115896U JP 11589677 U JP11589677 U JP 11589677U JP S5727140 Y2 JPS5727140 Y2 JP S5727140Y2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Die Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1977115896U JPS5727140Y2 (en:Method) | 1977-08-29 | 1977-08-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1977115896U JPS5727140Y2 (en:Method) | 1977-08-29 | 1977-08-29 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5442467U JPS5442467U (en:Method) | 1979-03-22 |
| JPS5727140Y2 true JPS5727140Y2 (en:Method) | 1982-06-14 |
Family
ID=29067942
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1977115896U Expired JPS5727140Y2 (en:Method) | 1977-08-29 | 1977-08-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5727140Y2 (en:Method) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5681940A (en) * | 1979-12-10 | 1981-07-04 | Hitachi Ltd | Pellet bonding device |
-
1977
- 1977-08-29 JP JP1977115896U patent/JPS5727140Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5442467U (en:Method) | 1979-03-22 |