JPS5719826A - Timer circuit - Google Patents

Timer circuit

Info

Publication number
JPS5719826A
JPS5719826A JP9362180A JP9362180A JPS5719826A JP S5719826 A JPS5719826 A JP S5719826A JP 9362180 A JP9362180 A JP 9362180A JP 9362180 A JP9362180 A JP 9362180A JP S5719826 A JPS5719826 A JP S5719826A
Authority
JP
Japan
Prior art keywords
counter
outputs
selector
chno
chc
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9362180A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6160464B2 (enExample
Inventor
Makoto Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9362180A priority Critical patent/JPS5719826A/ja
Publication of JPS5719826A publication Critical patent/JPS5719826A/ja
Publication of JPS6160464B2 publication Critical patent/JPS6160464B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/423—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with synchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Measurement Of Predetermined Time Intervals (AREA)
JP9362180A 1980-07-09 1980-07-09 Timer circuit Granted JPS5719826A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9362180A JPS5719826A (en) 1980-07-09 1980-07-09 Timer circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9362180A JPS5719826A (en) 1980-07-09 1980-07-09 Timer circuit

Publications (2)

Publication Number Publication Date
JPS5719826A true JPS5719826A (en) 1982-02-02
JPS6160464B2 JPS6160464B2 (enExample) 1986-12-20

Family

ID=14087385

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9362180A Granted JPS5719826A (en) 1980-07-09 1980-07-09 Timer circuit

Country Status (1)

Country Link
JP (1) JPS5719826A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6222167A (ja) * 1985-07-22 1987-01-30 Nec Corp タイムアウト検出回路

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6222167A (ja) * 1985-07-22 1987-01-30 Nec Corp タイムアウト検出回路

Also Published As

Publication number Publication date
JPS6160464B2 (enExample) 1986-12-20

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