JPS57184348A - Estimating method for data error factor - Google Patents
Estimating method for data error factorInfo
- Publication number
- JPS57184348A JPS57184348A JP56068870A JP6887081A JPS57184348A JP S57184348 A JPS57184348 A JP S57184348A JP 56068870 A JP56068870 A JP 56068870A JP 6887081 A JP6887081 A JP 6887081A JP S57184348 A JPS57184348 A JP S57184348A
- Authority
- JP
- Japan
- Prior art keywords
- data
- circuit
- error factor
- digital data
- data error
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/20—Arrangements for detecting or preventing errors in the information received using signal quality detector
Landscapes
- Engineering & Computer Science (AREA)
- Quality & Reliability (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Maintenance And Management Of Digital Transmission (AREA)
Abstract
PURPOSE:To estimate the error factor of the data, by converting the received data into a digital data on the 2-dimensional coordinates and counting the number of digital data approximate to the line of decision set on the 2-dimensional coordinates. CONSTITUTION:A received data Din is converted into a digital data D d of an eye pattern via an MODEM15. The data Dd is apparated to a data error deciding circuit 72 via a level converter 71. The digital data Dr1 and Dr2 corresponding to the line of decision set in the region where the data Dd must not exist are applied to the circuit 72 via a gate 74. The circuit 72 obtains the coincidence between both inputs, and the coincidence signal is applied to a counter circuit 73. Then the error factor is estimated by the count value of the circuit 73.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56068870A JPS57184348A (en) | 1981-05-09 | 1981-05-09 | Estimating method for data error factor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56068870A JPS57184348A (en) | 1981-05-09 | 1981-05-09 | Estimating method for data error factor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57184348A true JPS57184348A (en) | 1982-11-13 |
Family
ID=13386119
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56068870A Pending JPS57184348A (en) | 1981-05-09 | 1981-05-09 | Estimating method for data error factor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57184348A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5479507A (en) * | 1977-12-07 | 1979-06-25 | Fujitsu Ltd | Supervisoly device for error rate |
-
1981
- 1981-05-09 JP JP56068870A patent/JPS57184348A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5479507A (en) * | 1977-12-07 | 1979-06-25 | Fujitsu Ltd | Supervisoly device for error rate |
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