JPS57176434A - Absolute time synchronizing system for decentralized processing system - Google Patents

Absolute time synchronizing system for decentralized processing system

Info

Publication number
JPS57176434A
JPS57176434A JP56061049A JP6104981A JPS57176434A JP S57176434 A JPS57176434 A JP S57176434A JP 56061049 A JP56061049 A JP 56061049A JP 6104981 A JP6104981 A JP 6104981A JP S57176434 A JPS57176434 A JP S57176434A
Authority
JP
Japan
Prior art keywords
time
time information
transmission
information
lpus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56061049A
Other languages
Japanese (ja)
Other versions
JPH0160853B2 (en
Inventor
Toshikazu Katsuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Tateisi Electronics Co
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tateisi Electronics Co, Omron Tateisi Electronics Co filed Critical Tateisi Electronics Co
Priority to JP56061049A priority Critical patent/JPS57176434A/en
Publication of JPS57176434A publication Critical patent/JPS57176434A/en
Publication of JPH0160853B2 publication Critical patent/JPH0160853B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Electric Clocks (AREA)
  • Computer And Data Communications (AREA)

Abstract

PURPOSE:To take absolute time synchronism for a decentralized processing system, by transmitting time information from a center device to local devices newly, after a time set with a timer means after the transmission of time information from the center device to the local devices. CONSTITUTION:A center computer 1 makes transmission request of time information T1 to a communication controller 2, transmits the time information T1 to each local processor LPU via communication circuits L1-Ln and the information reaches each LPU after a slight time delay. Owing to any cause, some LPUs can not receive the time information. The center computer 1 is provided with a timer, a time t0(remonitor time) which is negligible to the time T1 is taken as the set time of the timer. If the transmission to the LPUs is not finished within t0 after transmission, a time information T2 is newly transmitted and when all the LPUs receive within the t0 after the transmission, the T2 is taken as the time information, allowing to cancel the difference of the absolute time.
JP56061049A 1981-04-22 1981-04-22 Absolute time synchronizing system for decentralized processing system Granted JPS57176434A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56061049A JPS57176434A (en) 1981-04-22 1981-04-22 Absolute time synchronizing system for decentralized processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56061049A JPS57176434A (en) 1981-04-22 1981-04-22 Absolute time synchronizing system for decentralized processing system

Publications (2)

Publication Number Publication Date
JPS57176434A true JPS57176434A (en) 1982-10-29
JPH0160853B2 JPH0160853B2 (en) 1989-12-26

Family

ID=13159972

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56061049A Granted JPS57176434A (en) 1981-04-22 1981-04-22 Absolute time synchronizing system for decentralized processing system

Country Status (1)

Country Link
JP (1) JPS57176434A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS628256A (en) * 1985-07-04 1987-01-16 Fujitsu Ltd Real timer setting system
JPS6363238A (en) * 1986-09-04 1988-03-19 Matsushita Commun Ind Co Ltd Timing device for network system

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04130151U (en) * 1991-05-23 1992-11-30 新東ブレーター株式会社 Deburring and polishing machine

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5327784A (en) * 1976-08-25 1978-03-15 Hitachi Ltd Information transmitting device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5327784A (en) * 1976-08-25 1978-03-15 Hitachi Ltd Information transmitting device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS628256A (en) * 1985-07-04 1987-01-16 Fujitsu Ltd Real timer setting system
JPS6363238A (en) * 1986-09-04 1988-03-19 Matsushita Commun Ind Co Ltd Timing device for network system

Also Published As

Publication number Publication date
JPH0160853B2 (en) 1989-12-26

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