JPS57174965A - Signal transmitter - Google Patents

Signal transmitter

Info

Publication number
JPS57174965A
JPS57174965A JP56060746A JP6074681A JPS57174965A JP S57174965 A JPS57174965 A JP S57174965A JP 56060746 A JP56060746 A JP 56060746A JP 6074681 A JP6074681 A JP 6074681A JP S57174965 A JPS57174965 A JP S57174965A
Authority
JP
Japan
Prior art keywords
data signal
pulse
circuit
signal
synchronizing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56060746A
Other languages
Japanese (ja)
Inventor
Tomio Nakaji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP56060746A priority Critical patent/JPS57174965A/en
Publication of JPS57174965A publication Critical patent/JPS57174965A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00Arrangements affording multiple use of the transmission path
    • H04L5/02Channels characterised by the type of signal
    • H04L5/04Channels characterised by the type of signal the signals being represented by different amplitudes or polarities, e.g. quadriplex

Abstract

PURPOSE:To increase number of transmitted items, by superimposing other data consisting of shorter pulses on a data signal. CONSTITUTION:The 1st data signal is transmitted through parallel-serial conversion. In this case, a synchronizing signal (b) is given to a pulse oscillation circuit 12 and a pulse pickup circuit 13. The circuit 12 generates a pulse with shorter period in synchronizing with the synchronizing signal (b). The circuit 13 is operated as a gate to the said pulse based on the 2nd data signal inputted to a terminal 14. As a result, the 2nd data signal is formed with the shorter pulse. The 2nd data signal is superimposed on a part of the synchronizing signal of the 1st data signal. As a result, the two signals are transmitted with the same carrier.
JP56060746A 1981-04-20 1981-04-20 Signal transmitter Pending JPS57174965A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56060746A JPS57174965A (en) 1981-04-20 1981-04-20 Signal transmitter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56060746A JPS57174965A (en) 1981-04-20 1981-04-20 Signal transmitter

Publications (1)

Publication Number Publication Date
JPS57174965A true JPS57174965A (en) 1982-10-27

Family

ID=13151136

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56060746A Pending JPS57174965A (en) 1981-04-20 1981-04-20 Signal transmitter

Country Status (1)

Country Link
JP (1) JPS57174965A (en)

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