Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
  • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L24/42—Wire connectors; Manufacturing methods related thereto
  • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
  • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/42—Wire connectors; Manufacturing methods related thereto
  • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
  • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
  • H01L2224/481—Disposition
  • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
  • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/42—Wire connectors; Manufacturing methods related thereto
  • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
  • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
  • H01L2224/481—Disposition
  • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
  • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
  • H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain

Landscapes

• Engineering & Computer Science (AREA)
• Computer Hardware Design (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Power Engineering (AREA)
• Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Priority Applications (1)

Applications Claiming Priority (1)

Publications (1)

Family

ID=29852606

Family Applications (1)

Country Status (1)

Cited By (1)

Citations (2)

• 1981
  • 1981-04-17 JP JP5609081U patent/JPS57168257U/ja active Pending

Patent Citations (2)

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