JPS57152591A - Semiconductor memory cell - Google Patents

Semiconductor memory cell

Info

Publication number
JPS57152591A
JPS57152591A JP56036981A JP3698181A JPS57152591A JP S57152591 A JPS57152591 A JP S57152591A JP 56036981 A JP56036981 A JP 56036981A JP 3698181 A JP3698181 A JP 3698181A JP S57152591 A JPS57152591 A JP S57152591A
Authority
JP
Japan
Prior art keywords
depletion type
mesfet
another
memory cell
gaasmesfets
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56036981A
Other languages
Japanese (ja)
Inventor
Yoichiro Takayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56036981A priority Critical patent/JPS57152591A/en
Publication of JPS57152591A publication Critical patent/JPS57152591A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To easily manufacture the titled memory cell ensured a high speed, by using a depletion type MESFET. CONSTITUTION:An inverter is composed of a depletion type GaAsMESFETs 31 and 32 consisting a switching element and a depletion type GaAsMESFETs 33 and 34 consisting a load. Another inverter is composed of another depletion type GaAsMESFET 32 consisting a switching element and another depletion type GaAsMESFET 34 cosisting a load. An F/F circuit is configured by connecting the two pairs of inverters to each other through level shift circuits composed of schottky barrier diodes 43 and 44 and depletion type GaAsFETs 45 and 46, in such a way that the drain of the MESFET 31 is connected to the gate of the MESFET 32 and the drain of the MESFET 32 is connected to the gate of the MESFET 31, and coupling elements of the above mentioned inverters and data lines 17 and 18 are configured with depletion type MESFETs 35 and 36. The coupling elements are controlled by an address line 19.
JP56036981A 1981-03-13 1981-03-13 Semiconductor memory cell Pending JPS57152591A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56036981A JPS57152591A (en) 1981-03-13 1981-03-13 Semiconductor memory cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56036981A JPS57152591A (en) 1981-03-13 1981-03-13 Semiconductor memory cell

Publications (1)

Publication Number Publication Date
JPS57152591A true JPS57152591A (en) 1982-09-20

Family

ID=12484923

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56036981A Pending JPS57152591A (en) 1981-03-13 1981-03-13 Semiconductor memory cell

Country Status (1)

Country Link
JP (1) JPS57152591A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4805148A (en) * 1985-11-22 1989-02-14 Diehl Nagle Sherra E High impendance-coupled CMOS SRAM for improved single event immunity
JPH01315098A (en) * 1988-03-18 1989-12-20 Philips Gloeilampenfab:Nv Memory element, carry register and memory with these devices
EP0375226A2 (en) * 1988-12-21 1990-06-27 Texas Instruments Incorporated An seu hardened memory cell

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52146185A (en) * 1976-05-28 1977-12-05 Fujitsu Ltd Semiconductor integrated circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52146185A (en) * 1976-05-28 1977-12-05 Fujitsu Ltd Semiconductor integrated circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4805148A (en) * 1985-11-22 1989-02-14 Diehl Nagle Sherra E High impendance-coupled CMOS SRAM for improved single event immunity
JPH01315098A (en) * 1988-03-18 1989-12-20 Philips Gloeilampenfab:Nv Memory element, carry register and memory with these devices
EP0375226A2 (en) * 1988-12-21 1990-06-27 Texas Instruments Incorporated An seu hardened memory cell

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