JPS57150055A - Electronic desk calculator - Google Patents
Electronic desk calculatorInfo
- Publication number
- JPS57150055A JPS57150055A JP3452681A JP3452681A JPS57150055A JP S57150055 A JPS57150055 A JP S57150055A JP 3452681 A JP3452681 A JP 3452681A JP 3452681 A JP3452681 A JP 3452681A JP S57150055 A JPS57150055 A JP S57150055A
- Authority
- JP
- Japan
- Prior art keywords
- register
- data
- gate
- signal
- outputs
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/02—Digital computers in general; Data processing equipment in general manually operated with input through keyboard and computation using a built-in program, e.g. pocket calculators
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Calculators And Similar Devices (AREA)
Abstract
PURPOSE:To read out the contents of a 2nd register only by depressing a register correction key by installing a 1st register storing data so as to display them according to a specified format and the 2nd register storing data so as to be able to search the internal data most frequently. CONSTITUTION:A register DR1 stores data to be displayed according to a specified mode and a register DR2 stores the maximum data which are recognized most frequently, e.g. data of a mode displaying 7 places of decimals. A signal terminal DC of a CPU outputs ''1'' only when a CE key on a keyboard KB is depressed. Simultaneously with the supply of outputs from the registers DR1, DR2 to AND gates G1, G2, a signal inverted from the DC signal by an inverter I1 is supplied to the AND gate G1 and the DC signal is directly supplied to the AND gate G2. The outputs of the AND gates G1, G2 are supplied to a display device DSP through an OR gate G3. Thus, the gate G2 are opened during the period the CE key is continued to be depressed and the data of DR2 are displayed on the display device DSP.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3452681A JPS57150055A (en) | 1981-03-12 | 1981-03-12 | Electronic desk calculator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3452681A JPS57150055A (en) | 1981-03-12 | 1981-03-12 | Electronic desk calculator |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57150055A true JPS57150055A (en) | 1982-09-16 |
Family
ID=12416711
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3452681A Pending JPS57150055A (en) | 1981-03-12 | 1981-03-12 | Electronic desk calculator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57150055A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002036983A (en) * | 2000-05-19 | 2002-02-06 | Sumitomo Chem Co Ltd | Bumper reinforcing member |
-
1981
- 1981-03-12 JP JP3452681A patent/JPS57150055A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002036983A (en) * | 2000-05-19 | 2002-02-06 | Sumitomo Chem Co Ltd | Bumper reinforcing member |
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