JPS57147733A - Cross call controller - Google Patents

Cross call controller

Info

Publication number
JPS57147733A
JPS57147733A JP56032094A JP3209481A JPS57147733A JP S57147733 A JPS57147733 A JP S57147733A JP 56032094 A JP56032094 A JP 56032094A JP 3209481 A JP3209481 A JP 3209481A JP S57147733 A JPS57147733 A JP S57147733A
Authority
JP
Japan
Prior art keywords
rss
reserve
rsr
reserve signal
stage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56032094A
Other languages
Japanese (ja)
Other versions
JPS6027057B2 (en
Inventor
Tetsuo Nagabori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56032094A priority Critical patent/JPS6027057B2/en
Publication of JPS57147733A publication Critical patent/JPS57147733A/en
Publication of JPS6027057B2 publication Critical patent/JPS6027057B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)

Abstract

PURPOSE:To perform cross call while increasing processing capacity, by adding a reserve function to an input and output controller or to an equivalent controller. CONSTITUTION:A device-using instruction sent from each HOST is stored in the first-stage reserve signal registers 1RSR-0-1RSR-3, and is stored in the 2nd- stage reserve signal registers RSR'-0-RSR'-1 through selection switches CW-0 and CW-1. The reserve conditions between CH-A and CH-B, and between CH-C and CH-D are inputted to reserve signal generators RSS-1, RSS-0 and RSS-2 from an RSR-0 and an RSR-3. The reserve condition from other CNT is inputted to reserve signal generators RSS-0. RSS-1, RSS-2 and RSS-3 from respective 2nd- stage reserve signal registers RSR'-0 and RSR'-1. The reserve signal is transferred from the RSS-0 or the RSS-3 by combining these signals.
JP56032094A 1981-03-06 1981-03-06 Cross call control device Expired JPS6027057B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56032094A JPS6027057B2 (en) 1981-03-06 1981-03-06 Cross call control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56032094A JPS6027057B2 (en) 1981-03-06 1981-03-06 Cross call control device

Publications (2)

Publication Number Publication Date
JPS57147733A true JPS57147733A (en) 1982-09-11
JPS6027057B2 JPS6027057B2 (en) 1985-06-27

Family

ID=12349293

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56032094A Expired JPS6027057B2 (en) 1981-03-06 1981-03-06 Cross call control device

Country Status (1)

Country Link
JP (1) JPS6027057B2 (en)

Also Published As

Publication number Publication date
JPS6027057B2 (en) 1985-06-27

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