JPS57146350A - Data processor - Google Patents
Data processorInfo
- Publication number
- JPS57146350A JPS57146350A JP56029870A JP2987081A JPS57146350A JP S57146350 A JPS57146350 A JP S57146350A JP 56029870 A JP56029870 A JP 56029870A JP 2987081 A JP2987081 A JP 2987081A JP S57146350 A JPS57146350 A JP S57146350A
- Authority
- JP
- Japan
- Prior art keywords
- processor
- instruction
- test
- check
- machine check
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
PURPOSE:To perform tests for machine check processing function without requiring operators by generating an instruction instructing the generation of pseudo machine check from a test program and restarting a processor from a service processor. CONSTITUTION:A processor 1 and a service processor 2 offering the operation and required functions for the maintenance service are provided. When the processor 1 automatically performs a test of the case in check stop with a test program, the test mode is designated with the program instruction, and an instruction indicating the generation of pseudo machine check is generated to a machine check control unit 20 with a test program. When it is detected that a check stop display element 35 turns on, the processor 2 generates an instruction restarting the processor 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56029870A JPS57146350A (en) | 1981-03-04 | 1981-03-04 | Data processor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56029870A JPS57146350A (en) | 1981-03-04 | 1981-03-04 | Data processor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57146350A true JPS57146350A (en) | 1982-09-09 |
JPS6259814B2 JPS6259814B2 (en) | 1987-12-12 |
Family
ID=12288001
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56029870A Granted JPS57146350A (en) | 1981-03-04 | 1981-03-04 | Data processor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57146350A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0253143A (en) * | 1988-08-17 | 1990-02-22 | Nec Corp | Pseudo fault generating system |
-
1981
- 1981-03-04 JP JP56029870A patent/JPS57146350A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0253143A (en) * | 1988-08-17 | 1990-02-22 | Nec Corp | Pseudo fault generating system |
Also Published As
Publication number | Publication date |
---|---|
JPS6259814B2 (en) | 1987-12-12 |
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