JPS57124971A - Synchronizing separation circuit - Google Patents
Synchronizing separation circuitInfo
- Publication number
- JPS57124971A JPS57124971A JP998281A JP998281A JPS57124971A JP S57124971 A JPS57124971 A JP S57124971A JP 998281 A JP998281 A JP 998281A JP 998281 A JP998281 A JP 998281A JP S57124971 A JPS57124971 A JP S57124971A
- Authority
- JP
- Japan
- Prior art keywords
- clamp
- circuit
- signal
- clamp circuit
- time constant
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
- H04N5/08—Separation of synchronising signals from picture signals
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Synchronizing For Television (AREA)
Abstract
PURPOSE:To decrease jitter due to variance in video level and to increase the response speed at signal switching, by additionally providing a clamp circuit having comparatively small time constant with a clamp circuit having large time constant conventionally. CONSTITUTION:A composite video signal enters the 1st clamp circuit 4 and the 2nd clamp circuit 6 provided additionally, which constitute a synchronizing separation circuit as shown in the figure. The time constant CR of the 1st clamp circuit 4 is comparatively greater and the jitter of the synchronous front edge by high or low video level is less. Thus, the jitter of the front edge of a synchronizing signal separated at a comparator from this signal is also less. On the other hand, the time constant of the 2nd clamp circuit 6 is comparatively small, clamp pulses are generated in a short time at a slice circuit 7, and clamp circuits 4 and 6 clamp signals after switching in a short time, even if switching is made to a signal with different average level. Thus, the synchronizing separation circuit with less change in the front edge due to video level and quick response is put into prictice.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP998281A JPS57124971A (en) | 1981-01-26 | 1981-01-26 | Synchronizing separation circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP998281A JPS57124971A (en) | 1981-01-26 | 1981-01-26 | Synchronizing separation circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57124971A true JPS57124971A (en) | 1982-08-04 |
JPS6145430B2 JPS6145430B2 (en) | 1986-10-08 |
Family
ID=11735099
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP998281A Granted JPS57124971A (en) | 1981-01-26 | 1981-01-26 | Synchronizing separation circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57124971A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6183376U (en) * | 1984-11-02 | 1986-06-02 | ||
US7580078B2 (en) | 2005-01-25 | 2009-08-25 | Panasonic Corporation | Sync separator apparatus |
-
1981
- 1981-01-26 JP JP998281A patent/JPS57124971A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6183376U (en) * | 1984-11-02 | 1986-06-02 | ||
US7580078B2 (en) | 2005-01-25 | 2009-08-25 | Panasonic Corporation | Sync separator apparatus |
Also Published As
Publication number | Publication date |
---|---|
JPS6145430B2 (en) | 1986-10-08 |
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