JPS57123401A - Process input/output device - Google Patents

Process input/output device

Info

Publication number
JPS57123401A
JPS57123401A JP924181A JP924181A JPS57123401A JP S57123401 A JPS57123401 A JP S57123401A JP 924181 A JP924181 A JP 924181A JP 924181 A JP924181 A JP 924181A JP S57123401 A JPS57123401 A JP S57123401A
Authority
JP
Japan
Prior art keywords
computer
data signal
output data
line
relay
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP924181A
Other languages
Japanese (ja)
Inventor
Yukio Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP924181A priority Critical patent/JPS57123401A/en
Publication of JPS57123401A publication Critical patent/JPS57123401A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B15/00Systems controlled by a computer
    • G05B15/02Systems controlled by a computer electric

Abstract

PURPOSE:To designate only an optional plant device out of a computer and to control the device, by transmitting the output mask signal from the computer and closing only the desired one of the switches of an output data signal line. CONSTITUTION:The operation of each of plant devices 3 and 4 which are controlled by a computer 1 is controlled by a latching relay 5. In addition such relay 5, an output data signal line 6 is provided to transmit the output data signal from the computer 1 in order to control the relay 5. A switch 10 is inserted to each line 6. Furthermore the output mask signal is transmitted from the computer 1 and only the desired one of the switches 10 is closed by a means 9. And another means is added to gather plural pieces of line with addition of a group address and to send the output data signal to plural lines 6 from the computer 1 with the group address.
JP924181A 1981-01-24 1981-01-24 Process input/output device Pending JPS57123401A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP924181A JPS57123401A (en) 1981-01-24 1981-01-24 Process input/output device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP924181A JPS57123401A (en) 1981-01-24 1981-01-24 Process input/output device

Publications (1)

Publication Number Publication Date
JPS57123401A true JPS57123401A (en) 1982-07-31

Family

ID=11714903

Family Applications (1)

Application Number Title Priority Date Filing Date
JP924181A Pending JPS57123401A (en) 1981-01-24 1981-01-24 Process input/output device

Country Status (1)

Country Link
JP (1) JPS57123401A (en)

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