JPS57115084A - Television picture processing device - Google Patents
Television picture processing deviceInfo
- Publication number
- JPS57115084A JPS57115084A JP56000700A JP70081A JPS57115084A JP S57115084 A JPS57115084 A JP S57115084A JP 56000700 A JP56000700 A JP 56000700A JP 70081 A JP70081 A JP 70081A JP S57115084 A JPS57115084 A JP S57115084A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- vtr
- unit
- reproducing
- search
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B27/00—Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
- G11B27/02—Editing, e.g. varying the order of information signals recorded on, or reproduced from, record carriers
- G11B27/022—Electronic editing of analogue information signals, e.g. audio or video signals
- G11B27/024—Electronic editing of analogue information signals, e.g. audio or video signals on tapes
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Television Signal Processing For Recording (AREA)
Abstract
PURPOSE:To process a picture in accordance with a system of various adaptability, by utilizing a regular VTR and adding an electronic editing circuit and a simple device such as a circuit controlling the operation of recording, reproducing, search, etc. CONSTITUTION:On a regular VTR 1 having a rotary erase head, for instance, an electronic editing circuit 3, etc. are provided, and an SMPTE time code is recorded and reproduced to and from an auxiliary sound track at every field unit. On the other hand, a controlling circuit 11 controls the operation of a time code interface circuit 7, a VTR control interface circuit 8, etc., and controls the operation of recording, reproducing, search, etc. As a result, a video data stored in a frame memory 9 is read out at every unit, encoding and decoding simulation for band compression by DPCM, etc. for processing a picture is executed by use of data of plural units, and its result is written in the memory 9 again at every unit. In this way, it is possible to correspond to a system having various adaptability, by use of a simple circuit configuration.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56000700A JPS57115084A (en) | 1981-01-08 | 1981-01-08 | Television picture processing device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56000700A JPS57115084A (en) | 1981-01-08 | 1981-01-08 | Television picture processing device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57115084A true JPS57115084A (en) | 1982-07-17 |
Family
ID=11481036
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56000700A Pending JPS57115084A (en) | 1981-01-08 | 1981-01-08 | Television picture processing device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57115084A (en) |
-
1981
- 1981-01-08 JP JP56000700A patent/JPS57115084A/en active Pending
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