JPS57113667A - Pulse width transmission system - Google Patents

Pulse width transmission system

Info

Publication number
JPS57113667A
JPS57113667A JP15081A JP15081A JPS57113667A JP S57113667 A JPS57113667 A JP S57113667A JP 15081 A JP15081 A JP 15081A JP 15081 A JP15081 A JP 15081A JP S57113667 A JPS57113667 A JP S57113667A
Authority
JP
Japan
Prior art keywords
pulse
offset
channel
cut
width corresponding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15081A
Other languages
Japanese (ja)
Inventor
Kenichiro Katsumata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15081A priority Critical patent/JPS57113667A/en
Publication of JPS57113667A publication Critical patent/JPS57113667A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4902—Pulse width modulation; Pulse position modulation

Landscapes

  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE:To reject the distortion of pulse by a transmission line, by transmitting data pulse added with a specified pulse and subtracting the added pulse at reception. CONSTITUTION:At a transmission end 1, an offset pulse with a width corresponding to an offset current 5 is outputted after being coupled with the front end of the pulse with a width corresponding to a data current 6 at each channel. In this case, the offset pulse with a width corresponding to the offset current 5 is also outputted. At a reception end 2, a pulse and an offset pulse at each channel are received and the front end of the pulse is cut at an AND gate 8. A subtraction circuit 12 outputs a pulse width subtracting the offset pulse cut at the front end from the pulse of each channel cut at the front end as a data pulse. As a result, the adverse effect due to the distortion of pulse front end generated on the transmission line is eliminated.
JP15081A 1981-01-06 1981-01-06 Pulse width transmission system Pending JPS57113667A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15081A JPS57113667A (en) 1981-01-06 1981-01-06 Pulse width transmission system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15081A JPS57113667A (en) 1981-01-06 1981-01-06 Pulse width transmission system

Publications (1)

Publication Number Publication Date
JPS57113667A true JPS57113667A (en) 1982-07-15

Family

ID=11466003

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15081A Pending JPS57113667A (en) 1981-01-06 1981-01-06 Pulse width transmission system

Country Status (1)

Country Link
JP (1) JPS57113667A (en)

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