JPS5711076B2 - - Google Patents

Info

Publication number
JPS5711076B2
JPS5711076B2 JP6666175A JP6666175A JPS5711076B2 JP S5711076 B2 JPS5711076 B2 JP S5711076B2 JP 6666175 A JP6666175 A JP 6666175A JP 6666175 A JP6666175 A JP 6666175A JP S5711076 B2 JPS5711076 B2 JP S5711076B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP6666175A
Other versions
JPS516624A (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS516624A publication Critical patent/JPS516624A/ja
Publication of JPS5711076B2 publication Critical patent/JPS5711076B2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V30/00—Character recognition; Recognising digital ink; Document-oriented image-based pattern recognition
    • G06V30/10—Character recognition
    • G06V30/18—Extraction of features or characteristics of the image
    • G06V30/1801—Detecting partial patterns, e.g. edges or contours, or configurations, e.g. loops, corners, strokes or intersections
    • G06V30/18019—Detecting partial patterns, e.g. edges or contours, or configurations, e.g. loops, corners, strokes or intersections by matching or filtering
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V30/00—Character recognition; Recognising digital ink; Document-oriented image-based pattern recognition
    • G06V30/10—Character recognition
JP6666175A 1974-06-24 1975-06-04 Expired JPS5711076B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/482,824 US3990045A (en) 1974-06-24 1974-06-24 Array logic fabrication for use in pattern recognition equipments and the like

Publications (2)

Publication Number Publication Date
JPS516624A JPS516624A (ja) 1976-01-20
JPS5711076B2 true JPS5711076B2 (ja) 1982-03-02

Family

ID=23917603

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6666175A Expired JPS5711076B2 (ja) 1974-06-24 1975-06-04

Country Status (3)

Country Link
US (1) US3990045A (ja)
JP (1) JPS5711076B2 (ja)
CA (1) CA1049145A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0116635Y2 (ja) * 1982-06-01 1989-05-16

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS588588B2 (ja) * 1975-05-28 1983-02-16 株式会社日立製作所 半導体集積回路
GB1549642A (en) * 1976-08-03 1979-08-08 Nat Res Dev Inverters and logic gates employing inverters
JPS54167124U (ja) * 1978-05-15 1979-11-24
JPS5538547U (ja) * 1978-08-31 1980-03-12
US4870302A (en) * 1984-03-12 1989-09-26 Xilinx, Inc. Configurable electrical circuit having configurable logic elements and configurable interconnects
USRE34363E (en) * 1984-03-12 1993-08-31 Xilinx, Inc. Configurable electrical circuit having configurable logic elements and configurable interconnects
DE3587944T2 (de) * 1985-04-17 1995-04-20 Xilinx Inc Konfigurierbare logische Matrix.
US4786829A (en) * 1987-02-24 1988-11-22 Letcher John H Latched fedback memory finite-state-engine
US5235221A (en) * 1992-04-08 1993-08-10 Micron Technology, Inc. Field programmable logic array with speed optimized architecture
US5384500A (en) * 1992-05-15 1995-01-24 Micron Semiconductor, Inc. Programmable logic device macrocell with an exclusive feedback and an exclusive external input line for a combinatorial mode and accommodating two separate programmable or planes
US5331227A (en) * 1992-05-15 1994-07-19 Micron Semiconductor, Inc. Programmable logic device macrocell with an exclusive feedback line and an exclusive external input line
US5287017A (en) * 1992-05-15 1994-02-15 Micron Technology, Inc. Programmable logic device macrocell with two OR array inputs
US5300830A (en) * 1992-05-15 1994-04-05 Micron Semiconductor, Inc. Programmable logic device macrocell with an exclusive feedback and exclusive external input lines for registered and combinatorial modes using a dedicated product term for control
US5220215A (en) * 1992-05-15 1993-06-15 Micron Technology, Inc. Field programmable logic array with two or planes
US5298803A (en) * 1992-07-15 1994-03-29 Micron Semiconductor, Inc. Programmable logic device having low power microcells with selectable registered and combinatorial output signals
WO2013170040A1 (en) 2012-05-11 2013-11-14 Intel Corporation Systems and methods for row causal scan-order optimization stereo matching

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3454310A (en) * 1966-05-23 1969-07-08 Electronic Associates Boolian connective system
US3643232A (en) * 1967-06-05 1972-02-15 Texas Instruments Inc Large-scale integration of electronic systems in microminiature form
US3619583A (en) * 1968-10-11 1971-11-09 Bell Telephone Labor Inc Multiple function programmable arrays
US3706071A (en) * 1970-06-22 1972-12-12 Information Int Inc Binary image processor
US3818252A (en) * 1971-12-20 1974-06-18 Hitachi Ltd Universal logical integrated circuit
US3849638A (en) * 1973-07-18 1974-11-19 Gen Electric Segmented associative logic circuits

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
WILLIAM N.CARRLET.AL):"MOS1LST DESIGN AND APPLICA-TION,"=1972 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0116635Y2 (ja) * 1982-06-01 1989-05-16

Also Published As

Publication number Publication date
JPS516624A (ja) 1976-01-20
US3990045A (en) 1976-11-02
CA1049145A (en) 1979-02-20

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