JPS57109068A - Extended-address generator - Google Patents
Extended-address generatorInfo
- Publication number
- JPS57109068A JPS57109068A JP18650080A JP18650080A JPS57109068A JP S57109068 A JPS57109068 A JP S57109068A JP 18650080 A JP18650080 A JP 18650080A JP 18650080 A JP18650080 A JP 18650080A JP S57109068 A JPS57109068 A JP S57109068A
- Authority
- JP
- Japan
- Prior art keywords
- address
- data
- cpu
- extended
- address data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
- G06F9/342—Extension of operand address space
Abstract
PURPOSE:To generate extended-address data by decreasing the amount of information in an address table, by adding CPU address data and another address data generated by the address table digitally within the specific range of the address data of a CPU. CONSTITUTION:Address data, consisting of n' bits is supplied from a CPU to the terminal 1 of an extended-address generator to obtain L-bit extended-address data at a terminal 4. This generator is provided with an adder 5, and l'-bit address table data supplied from an address table via terminals 2 and 3 and another address data from the CPU are added together digitally to output extended-address data from the terminal 4. The number m' of data couples in the address table used for extension is used for both instruction access and data access, and some or all of address data from the CPU are supplied to specific address detector 8 to switch gate circuits 6 and 7 for corresponding spaces.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18650080A JPS57109068A (en) | 1980-12-26 | 1980-12-26 | Extended-address generator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18650080A JPS57109068A (en) | 1980-12-26 | 1980-12-26 | Extended-address generator |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57109068A true JPS57109068A (en) | 1982-07-07 |
Family
ID=16189572
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18650080A Pending JPS57109068A (en) | 1980-12-26 | 1980-12-26 | Extended-address generator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57109068A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5957356A (en) * | 1982-09-27 | 1984-04-02 | Ricoh Co Ltd | Memory extending system |
-
1980
- 1980-12-26 JP JP18650080A patent/JPS57109068A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5957356A (en) * | 1982-09-27 | 1984-04-02 | Ricoh Co Ltd | Memory extending system |
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