JPS5694834A - A/d converter - Google Patents
A/d converterInfo
- Publication number
- JPS5694834A JPS5694834A JP17188879A JP17188879A JPS5694834A JP S5694834 A JPS5694834 A JP S5694834A JP 17188879 A JP17188879 A JP 17188879A JP 17188879 A JP17188879 A JP 17188879A JP S5694834 A JPS5694834 A JP S5694834A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- voltage
- ccds2
- end part
- delay time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/50—Analogue/digital converters with intermediate conversion to time interval
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/50—Analogue/digital converters with intermediate conversion to time interval
- H03M1/502—Analogue/digital converters with intermediate conversion to time interval using tapped delay lines
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
PURPOSE:To obtain a high-accuracy A/D converter with an easy production, by making use of the signal delay effect caused by a CCD shift register. CONSTITUTION:The pulse delaying device 1 contains the 1st and 2nd CCDs2 and 3 which carry out a transfer in the opposite direction to each other plus the resistive insulator gate 5 provided between the CCDs2 and 3. The voltage Vb(t) obtained by sampling the analog voltage Va(t) is applied to the terminal P2, and thus a channel extending from the end part of the side of the terminal P2 up to the position corresponding to the sample voltage Vb(t) is caused right under the gate 5. As a result, each transfer path of the 1st and 2nd CCD is short-circuited at the end part S1 of the channel, and thus the control pulse VM given from the control pulse generator MGP and put into the terminal Q1 is delayed by the delay time tauD1 in accordance with the length of the integrated transfer path and then detected at the terminal Q2. This delay time is counted by the counter CNT to deliver the digital quantity to the parallel output terminal OUT.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17188879A JPS5694834A (en) | 1979-12-28 | 1979-12-28 | A/d converter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17188879A JPS5694834A (en) | 1979-12-28 | 1979-12-28 | A/d converter |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5694834A true JPS5694834A (en) | 1981-07-31 |
Family
ID=15931652
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17188879A Pending JPS5694834A (en) | 1979-12-28 | 1979-12-28 | A/d converter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5694834A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6512900B2 (en) * | 1999-12-06 | 2003-01-28 | Fuji Xerox Co., Ltd. | Image forming apparatus having alarm which indicates carrier solvent filter replacement or lack of solvent supply |
-
1979
- 1979-12-28 JP JP17188879A patent/JPS5694834A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6512900B2 (en) * | 1999-12-06 | 2003-01-28 | Fuji Xerox Co., Ltd. | Image forming apparatus having alarm which indicates carrier solvent filter replacement or lack of solvent supply |
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