JPS5689153A - Stand-by controlling circuit - Google Patents

Stand-by controlling circuit

Info

Publication number
JPS5689153A
JPS5689153A JP16593579A JP16593579A JPS5689153A JP S5689153 A JPS5689153 A JP S5689153A JP 16593579 A JP16593579 A JP 16593579A JP 16593579 A JP16593579 A JP 16593579A JP S5689153 A JPS5689153 A JP S5689153A
Authority
JP
Japan
Prior art keywords
circuit
counting
signal
counting circuit
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16593579A
Other languages
Japanese (ja)
Inventor
Hiroshi Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP16593579A priority Critical patent/JPS5689153A/en
Publication of JPS5689153A publication Critical patent/JPS5689153A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/02—Details
    • H04L12/10—Current supply arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)
  • Devices For Supply Of Signal Current (AREA)

Abstract

PURPOSE:To reduce power consumption at the stand-by time, by driving the counting circuit when the communiucation start signal is received and by stopping counting of the counting circuit when the communication end signal is received. CONSTITUTION:Controlling circuit 1 drives stopped counting circuit 2 by control output 15. Driven counting circuit 2 outputs timing signal 16 to decoder 3. Terminal equipment interface circuit 4 is controlled by timing control signal 17, which is decoded by decoder 3, to operate. Thus, communication is started by the communication start signal. Meanwhile, control circuit 1 stops counting of counting circuit 2 by control output 15. At this time, timing signal 16 of counting circuit 2 is not changed, and as the result, decoder 3 and terminal equipment interface circuit 4 become static.
JP16593579A 1979-12-20 1979-12-20 Stand-by controlling circuit Pending JPS5689153A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16593579A JPS5689153A (en) 1979-12-20 1979-12-20 Stand-by controlling circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16593579A JPS5689153A (en) 1979-12-20 1979-12-20 Stand-by controlling circuit

Publications (1)

Publication Number Publication Date
JPS5689153A true JPS5689153A (en) 1981-07-20

Family

ID=15821803

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16593579A Pending JPS5689153A (en) 1979-12-20 1979-12-20 Stand-by controlling circuit

Country Status (1)

Country Link
JP (1) JPS5689153A (en)

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