JPS5682433A - Fatigue test control device - Google Patents

Fatigue test control device

Info

Publication number
JPS5682433A
JPS5682433A JP15978779A JP15978779A JPS5682433A JP S5682433 A JPS5682433 A JP S5682433A JP 15978779 A JP15978779 A JP 15978779A JP 15978779 A JP15978779 A JP 15978779A JP S5682433 A JPS5682433 A JP S5682433A
Authority
JP
Japan
Prior art keywords
memory
testing machine
signal
stored
fatigue
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15978779A
Other languages
Japanese (ja)
Inventor
Masahiro Saito
Akinori Nagata
Yasuaki Miyazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15978779A priority Critical patent/JPS5682433A/en
Publication of JPS5682433A publication Critical patent/JPS5682433A/en
Pending legal-status Critical Current

Links

Landscapes

  • Investigating Strength Of Materials By Application Of Mechanical Stress (AREA)

Abstract

PURPOSE: To make a fatigue test efficient and automatic, by storing a control signal of the fatigue testing machine in advance in the data processing unit.
CONSTITUTION: A digital signal which is an input to the data processing unit 1 executes signal processing for controlling the fatigue testing machine 6, and after that, it is stored in the auxiliary memory 3 through the main memory 2. And, a data of the memory 3 is transferred to the main memory 4, and also it is provided to the fatigue testing machine 6 through the D/A converter 5. An analog signal showing the operation status of the testing machine 6 is stored in the main memory 8 through the A/D converter 7, and also it is stored in the auxiliary memory 9. In this case, if overflow occurs while a signal is being transferred from the memory 8 to the memory 9, the signal holding is instructed from the memory 8 to the memory 4, and the testing machine 6 is interlocked temporarily.
COPYRIGHT: (C)1981,JPO&Japio
JP15978779A 1979-12-11 1979-12-11 Fatigue test control device Pending JPS5682433A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15978779A JPS5682433A (en) 1979-12-11 1979-12-11 Fatigue test control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15978779A JPS5682433A (en) 1979-12-11 1979-12-11 Fatigue test control device

Publications (1)

Publication Number Publication Date
JPS5682433A true JPS5682433A (en) 1981-07-06

Family

ID=15701253

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15978779A Pending JPS5682433A (en) 1979-12-11 1979-12-11 Fatigue test control device

Country Status (1)

Country Link
JP (1) JPS5682433A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6123941A (en) * 1984-07-12 1986-02-01 Jeol Ltd Imaging method of metal fatigue state

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6123941A (en) * 1984-07-12 1986-02-01 Jeol Ltd Imaging method of metal fatigue state

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