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Publication date
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Priority to JP1976018430UpriorityCriticalpatent/JPS5647963Y2/ja
Publication of JPS52112770UpublicationCriticalpatent/JPS52112770U/ja
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Publication of JPS5647963Y2publicationCriticalpatent/JPS5647963Y2/ja
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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Engineering & Computer Science
(AREA)
Computer Hardware Design
(AREA)
Microelectronics & Electronic Packaging
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Power Engineering
(AREA)
Wire Bonding
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Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices
(AREA)