JPS5630838B2 - - Google Patents

Info

Publication number
JPS5630838B2
JPS5630838B2 JP6306776A JP6306776A JPS5630838B2 JP S5630838 B2 JPS5630838 B2 JP S5630838B2 JP 6306776 A JP6306776 A JP 6306776A JP 6306776 A JP6306776 A JP 6306776A JP S5630838 B2 JPS5630838 B2 JP S5630838B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP6306776A
Other languages
Japanese (ja)
Other versions
JPS52146274A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6306776A priority Critical patent/JPS52146274A/ja
Priority to US05/802,136 priority patent/US4129792A/en
Publication of JPS52146274A publication Critical patent/JPS52146274A/ja
Publication of JPS5630838B2 publication Critical patent/JPS5630838B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G04HOROLOGY
    • G04GELECTRONIC TIME-PIECES
    • G04G19/00Electric power supply circuits specially adapted for use in electronic time-pieces
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008Arrangements for reducing power consumption
    • H03K19/0013Arrangements for reducing power consumption in field effect transistor circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection
    • H03K19/00346Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01Shaping pulses
    • H03K5/02Shaping pulses by amplifying
    • H03K5/023Shaping pulses by amplifying using field effect transistors

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Nonlinear Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Electromechanical Clocks (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
JP6306776A 1976-05-31 1976-05-31 Output circuit Granted JPS52146274A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP6306776A JPS52146274A (en) 1976-05-31 1976-05-31 Output circuit
US05/802,136 US4129792A (en) 1976-05-31 1977-05-31 Driver buffer circuit using delay inverters

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6306776A JPS52146274A (en) 1976-05-31 1976-05-31 Output circuit

Publications (2)

Publication Number Publication Date
JPS52146274A JPS52146274A (en) 1977-12-05
JPS5630838B2 true JPS5630838B2 (show.php) 1981-07-17

Family

ID=13218613

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6306776A Granted JPS52146274A (en) 1976-05-31 1976-05-31 Output circuit

Country Status (2)

Country Link
US (1) US4129792A (show.php)
JP (1) JPS52146274A (show.php)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4250410A (en) * 1979-02-27 1981-02-10 Motorola, Inc. Speed-up circuit
US4347445A (en) * 1979-12-31 1982-08-31 Exxon Research And Engineering Co. Floating hybrid switch
JPS58121195A (ja) * 1982-01-13 1983-07-19 Nec Corp プリチヤ−ジ信号発生回路
US4482826A (en) * 1982-02-16 1984-11-13 Lecroy Research Systems Corporation Programmable delay device
US4612457A (en) * 1983-06-27 1986-09-16 Texas Instruments Incorporated Current limiting output buffer for integrated circuit
JPS61125224A (ja) * 1984-11-21 1986-06-12 Sony Corp 半導体回路装置
US4763303A (en) * 1986-02-24 1988-08-09 Motorola, Inc. Write-drive data controller
US5010256A (en) * 1989-02-21 1991-04-23 United Technologies Corporation Gate output driver using slew-rate control
US4962345A (en) * 1989-11-06 1990-10-09 Ncr Corporation Current limiting output driver
KR920015363A (ko) * 1991-01-22 1992-08-26 김광호 Ttl 입력 버퍼회로
SE518573C2 (sv) * 1997-12-04 2002-10-22 Ericsson Telefon Ab L M Elektronisk krets resp. omkopplare för styrning av konduktans samt förfarande för tillverkning av dylik krets
FR2806548B1 (fr) 2000-03-17 2002-08-23 Ge Power Controls France Mecanisme extractible pour disjoncteurs

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2858434A (en) * 1956-09-25 1958-10-28 Collins Radio Co Precision step voltage generator
US3378783A (en) * 1965-12-13 1968-04-16 Rca Corp Optimized digital amplifier utilizing insulated-gate field-effect transistors
DE2149106C3 (de) * 1971-09-28 1975-06-26 Siemens Ag, 1000 Berlin Und 8000 Muenchen Steuer- und Regeleinrichtung für den Linsenstrom von Elektronenmikroskopen
US3857045A (en) * 1973-04-17 1974-12-24 Nasa Four-phase logic systems
US3942162A (en) * 1974-07-01 1976-03-02 Motorola, Inc. Pre-conditioning circuits for MOS integrated circuits
US3996481A (en) * 1974-11-19 1976-12-07 International Business Machines Corporation FET load gate compensator

Also Published As

Publication number Publication date
US4129792A (en) 1978-12-12
JPS52146274A (en) 1977-12-05

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