JPS5629963U - - Google Patents
Info
- Publication number
- JPS5629963U JPS5629963U JP11259379U JP11259379U JPS5629963U JP S5629963 U JPS5629963 U JP S5629963U JP 11259379 U JP11259379 U JP 11259379U JP 11259379 U JP11259379 U JP 11259379U JP S5629963 U JPS5629963 U JP S5629963U
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11259379U JPS5629963U (uk) | 1979-08-15 | 1979-08-15 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11259379U JPS5629963U (uk) | 1979-08-15 | 1979-08-15 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5629963U true JPS5629963U (uk) | 1981-03-23 |
Family
ID=29344960
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11259379U Pending JPS5629963U (uk) | 1979-08-15 | 1979-08-15 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5629963U (uk) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6429885U (uk) * | 1987-08-13 | 1989-02-22 |
-
1979
- 1979-08-15 JP JP11259379U patent/JPS5629963U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6429885U (uk) * | 1987-08-13 | 1989-02-22 |