JPS562742A - Frequency synthesizer - Google Patents

Frequency synthesizer

Info

Publication number
JPS562742A
JPS562742A JP7869279A JP7869279A JPS562742A JP S562742 A JPS562742 A JP S562742A JP 7869279 A JP7869279 A JP 7869279A JP 7869279 A JP7869279 A JP 7869279A JP S562742 A JPS562742 A JP S562742A
Authority
JP
Japan
Prior art keywords
multiplier
capacitor
range
wide
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7869279A
Other languages
Japanese (ja)
Other versions
JPS6358412B2 (en
Inventor
Susumu Takashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP7869279A priority Critical patent/JPS562742A/en
Publication of JPS562742A publication Critical patent/JPS562742A/en
Publication of JPS6358412B2 publication Critical patent/JPS6358412B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/187—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop
    • H03L7/189—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop comprising a D/A converter for generating a coarse tuning voltage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/06—Phase locked loops with a controlled oscillator having at least two frequency control terminals

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To make it possible to obtain stably a wide-range frequency signal, by changing continuously the capacity of a timing capacitor by a voltage multiplier. CONSTITUTION:The free running oscillation frequency of voltage control oscillator 6 is determined by timing capacitor CT. Voltage multiplier 8 is connected to this capacitor CT, and the equivalent capacity of capacitor CT is controlled variably by multiplier 8. In this case, multiplier 8 changes continuously the free running oscillation frequency of oscillator 6 to extend the range of frequency multiplication, so that a wide-range frequency signal can be obtained stably.
JP7869279A 1979-06-22 1979-06-22 Frequency synthesizer Granted JPS562742A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7869279A JPS562742A (en) 1979-06-22 1979-06-22 Frequency synthesizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7869279A JPS562742A (en) 1979-06-22 1979-06-22 Frequency synthesizer

Publications (2)

Publication Number Publication Date
JPS562742A true JPS562742A (en) 1981-01-13
JPS6358412B2 JPS6358412B2 (en) 1988-11-15

Family

ID=13668909

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7869279A Granted JPS562742A (en) 1979-06-22 1979-06-22 Frequency synthesizer

Country Status (1)

Country Link
JP (1) JPS562742A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4612516A (en) * 1981-10-16 1986-09-16 U.S. Philips Corporation Rapidly tunable frequency synthesizer with oscillator frequency presetting means
JPH05152943A (en) * 1991-11-26 1993-06-18 Sanyo Electric Co Ltd Phase locked loop and interface circuit employing it

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4612516A (en) * 1981-10-16 1986-09-16 U.S. Philips Corporation Rapidly tunable frequency synthesizer with oscillator frequency presetting means
JPH05152943A (en) * 1991-11-26 1993-06-18 Sanyo Electric Co Ltd Phase locked loop and interface circuit employing it

Also Published As

Publication number Publication date
JPS6358412B2 (en) 1988-11-15

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