JPS5623888Y2 - - Google Patents

Info

Publication number
JPS5623888Y2
JPS5623888Y2 JP1974006439U JP643974U JPS5623888Y2 JP S5623888 Y2 JPS5623888 Y2 JP S5623888Y2 JP 1974006439 U JP1974006439 U JP 1974006439U JP 643974 U JP643974 U JP 643974U JP S5623888 Y2 JPS5623888 Y2 JP S5623888Y2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1974006439U
Other languages
Japanese (ja)
Other versions
JPS5098671U (cs
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1974006439U priority Critical patent/JPS5623888Y2/ja
Publication of JPS5098671U publication Critical patent/JPS5098671U/ja
Application granted granted Critical
Publication of JPS5623888Y2 publication Critical patent/JPS5623888Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48235Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a via metallisation of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/15165Monolayer substrate

Landscapes

  • Wire Bonding (AREA)
JP1974006439U 1974-01-10 1974-01-10 Expired JPS5623888Y2 (cs)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1974006439U JPS5623888Y2 (cs) 1974-01-10 1974-01-10

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1974006439U JPS5623888Y2 (cs) 1974-01-10 1974-01-10

Publications (2)

Publication Number Publication Date
JPS5098671U JPS5098671U (cs) 1975-08-16
JPS5623888Y2 true JPS5623888Y2 (cs) 1981-06-04

Family

ID=28070877

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1974006439U Expired JPS5623888Y2 (cs) 1974-01-10 1974-01-10

Country Status (1)

Country Link
JP (1) JPS5623888Y2 (cs)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3483308A (en) * 1968-10-24 1969-12-09 Texas Instruments Inc Modular packages for semiconductor devices
JPS4823962U (cs) * 1971-07-28 1973-03-19

Also Published As

Publication number Publication date
JPS5098671U (cs) 1975-08-16

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