JPS561672A - Solid state pickup device - Google Patents

Solid state pickup device

Info

Publication number
JPS561672A
JPS561672A JP7693079A JP7693079A JPS561672A JP S561672 A JPS561672 A JP S561672A JP 7693079 A JP7693079 A JP 7693079A JP 7693079 A JP7693079 A JP 7693079A JP S561672 A JPS561672 A JP S561672A
Authority
JP
Japan
Prior art keywords
region
integration
gate
solid state
pickup device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7693079A
Other languages
Japanese (ja)
Other versions
JPS6221274B2 (en
Inventor
Minoru Okada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP7693079A priority Critical patent/JPS561672A/en
Publication of JPS561672A publication Critical patent/JPS561672A/en
Publication of JPS6221274B2 publication Critical patent/JPS6221274B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof

Abstract

PURPOSE:To facilitate an easy integration in the vertical direction of the picture shown in the figure without any complicated signal process but by providing the gate which applies the signal of the photosensitive region to the integration reading register which is adjacent to one end of the photosensitive region. CONSTITUTION:One end of storing region 3 is put adjacent to one end of photosensitive region 2 of SiCCD1, and reading register 4 is installed at the other end of region 3. Furthermore, integration reading register 6 is added. Then gate 7 is provided in adjacency to the other side of region 2. Thus the signal sent from region 2 is applied to gate 7 only at the necessary section. And the picture element signals of region 2 with every or every second frame are transferred to region 3 and register 6 alternately. As a result, the integration can be facilitated in the vertical direction of the picture shown in the figure and without any complicated signal process.
JP7693079A 1979-06-20 1979-06-20 Solid state pickup device Granted JPS561672A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7693079A JPS561672A (en) 1979-06-20 1979-06-20 Solid state pickup device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7693079A JPS561672A (en) 1979-06-20 1979-06-20 Solid state pickup device

Publications (2)

Publication Number Publication Date
JPS561672A true JPS561672A (en) 1981-01-09
JPS6221274B2 JPS6221274B2 (en) 1987-05-12

Family

ID=13619433

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7693079A Granted JPS561672A (en) 1979-06-20 1979-06-20 Solid state pickup device

Country Status (1)

Country Link
JP (1) JPS561672A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50114117A (en) * 1974-02-15 1975-09-06

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50114117A (en) * 1974-02-15 1975-09-06

Also Published As

Publication number Publication date
JPS6221274B2 (en) 1987-05-12

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