JPS56163583A - Semiconductor circuit - Google Patents

Semiconductor circuit

Info

Publication number
JPS56163583A
JPS56163583A JP6446680A JP6446680A JPS56163583A JP S56163583 A JPS56163583 A JP S56163583A JP 6446680 A JP6446680 A JP 6446680A JP 6446680 A JP6446680 A JP 6446680A JP S56163583 A JPS56163583 A JP S56163583A
Authority
JP
Japan
Prior art keywords
resistors
manufacture
holding voltage
different processes
holding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6446680A
Other languages
Japanese (ja)
Other versions
JPS6055915B2 (en
Inventor
Joji Nokubo
Yuji Iwazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
NEC Engineering Ltd
Original Assignee
NEC Corp
NEC Engineering Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, NEC Engineering Ltd, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55064466A priority Critical patent/JPS6055915B2/en
Publication of JPS56163583A publication Critical patent/JPS56163583A/en
Publication of JPS6055915B2 publication Critical patent/JPS6055915B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4116—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access via separately connected emittors of said transistors or via multiple emittors, e.g. T2L, ECL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To avoid the variation of the holding voltage of a memory cell to the fluctuation of the resistance value, by making each potential drop of the resistors having different processes of manufacture to have no relation to the absolute value of each of these resistors. CONSTITUTION:A holding voltage circuit of a memory cell A4 using a flip-flop is taken as an example. Resistors R1 and R2 have different processes of manufacture, and the manufacturing process is equal between resistors R2 and R4 as well as R1 and R3 respectively. When the cell A4 is holding the information, a holding voltage VR2 caused at the resistor R2 connected to the collector of a transistor which is turned on is equal to (a/b)xVf. Here R3=a.R1 and R4=b.R2(a, b=integers) are defined, and Vf is the offset voltage between the base and the emitter of a transistor. As a result, the holding voltage VR2 is made constant to the fluctuation of the set values of resistors having different processes of manufacture.
JP55064466A 1980-05-15 1980-05-15 semiconductor circuit Expired JPS6055915B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55064466A JPS6055915B2 (en) 1980-05-15 1980-05-15 semiconductor circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55064466A JPS6055915B2 (en) 1980-05-15 1980-05-15 semiconductor circuit

Publications (2)

Publication Number Publication Date
JPS56163583A true JPS56163583A (en) 1981-12-16
JPS6055915B2 JPS6055915B2 (en) 1985-12-07

Family

ID=13259026

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55064466A Expired JPS6055915B2 (en) 1980-05-15 1980-05-15 semiconductor circuit

Country Status (1)

Country Link
JP (1) JPS6055915B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58169392A (en) * 1982-03-30 1983-10-05 Fujitsu Ltd Semiconductor memory provided with biasing circuit for word line discharge current source

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58169392A (en) * 1982-03-30 1983-10-05 Fujitsu Ltd Semiconductor memory provided with biasing circuit for word line discharge current source
JPS6249677B2 (en) * 1982-03-30 1987-10-20 Fujitsu Ltd

Also Published As

Publication number Publication date
JPS6055915B2 (en) 1985-12-07

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