JPS56160138A - Logical simulation system - Google Patents

Logical simulation system

Info

Publication number
JPS56160138A
JPS56160138A JP6364280A JP6364280A JPS56160138A JP S56160138 A JPS56160138 A JP S56160138A JP 6364280 A JP6364280 A JP 6364280A JP 6364280 A JP6364280 A JP 6364280A JP S56160138 A JPS56160138 A JP S56160138A
Authority
JP
Japan
Prior art keywords
circuit
simulated
circuit elements
elements
logical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6364280A
Other languages
Japanese (ja)
Inventor
Yasushi Wada
Norio Kuji
Makoto Aoki
Takatoshi Nakajima
Tsunetaka Sudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP6364280A priority Critical patent/JPS56160138A/en
Publication of JPS56160138A publication Critical patent/JPS56160138A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns

Abstract

PURPOSE:To obtain a result of simulation in a short time, by giving a logical operation to be carried out to each of plural circuit elements consisting of a number of arithmetic processing circuit elements with each of coresponding circuit elements to be simulated. CONSTITUTION:An arithmetic processing circuit 1 possessing a number of arithmetic processing circuit elements M(M11-M810) is used along with a host computer 2. The circuit elements M of the circuit 1 are controlled in terms of a single meaning by the computer 2. A circuit corresponding to a logical circuit to be simulated is formed with plural circuit elements among the elements M. Then a logical operation to be carried out is performed by the circuit element to be simulated of a logical circuit to be simulated and with plural circuit elements. Thus a simulated result is obtained.
JP6364280A 1980-05-14 1980-05-14 Logical simulation system Pending JPS56160138A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6364280A JPS56160138A (en) 1980-05-14 1980-05-14 Logical simulation system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6364280A JPS56160138A (en) 1980-05-14 1980-05-14 Logical simulation system

Publications (1)

Publication Number Publication Date
JPS56160138A true JPS56160138A (en) 1981-12-09

Family

ID=13235204

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6364280A Pending JPS56160138A (en) 1980-05-14 1980-05-14 Logical simulation system

Country Status (1)

Country Link
JP (1) JPS56160138A (en)

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