JPS56149848A - Signal transmission system - Google Patents

Signal transmission system

Info

Publication number
JPS56149848A
JPS56149848A JP5388480A JP5388480A JPS56149848A JP S56149848 A JPS56149848 A JP S56149848A JP 5388480 A JP5388480 A JP 5388480A JP 5388480 A JP5388480 A JP 5388480A JP S56149848 A JPS56149848 A JP S56149848A
Authority
JP
Japan
Prior art keywords
bits
bit
frame
noise
transmitted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5388480A
Other languages
Japanese (ja)
Inventor
Tadaaki Ogata
Reijiro Nishiyama
Toshiyuki Taguchi
Kenji Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TOKYO SOGO KEIBI HOSHIYOU KK
TOKYO SOGO KEIBI HOSHO KK
NEC Corp
Original Assignee
TOKYO SOGO KEIBI HOSHIYOU KK
TOKYO SOGO KEIBI HOSHO KK
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TOKYO SOGO KEIBI HOSHIYOU KK, TOKYO SOGO KEIBI HOSHO KK, NEC Corp, Nippon Electric Co Ltd filed Critical TOKYO SOGO KEIBI HOSHIYOU KK
Priority to JP5388480A priority Critical patent/JPS56149848A/en
Publication of JPS56149848A publication Critical patent/JPS56149848A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
    • H04L1/0083—Formatting with frames or packets; Protocol or part of protocol for error control

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:To prevent deterioration of reliability of a signal, which is caused by a transmission loss and a noise, by transmitting a frame consisting of period of 1 bit, address of (m) bits and information of (n) bits, by means of two-phase differential phase-shift keying. CONSTITUTION:The system A is constitute of a master station 100 and slave stations 1-15. The frame consists of a synchronizing bit F=the first bit, address bits m=4 bits, and information bits n=3 bits, and this frame is brought to two-phase differential phase-shift keying and is transmitted. In this way, a signal can be transmitted with high reliability even in case of a transmission line having a large absolute amount of a transmission loss and a noise, such as a distribution line.
JP5388480A 1980-04-23 1980-04-23 Signal transmission system Pending JPS56149848A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5388480A JPS56149848A (en) 1980-04-23 1980-04-23 Signal transmission system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5388480A JPS56149848A (en) 1980-04-23 1980-04-23 Signal transmission system

Publications (1)

Publication Number Publication Date
JPS56149848A true JPS56149848A (en) 1981-11-19

Family

ID=12955158

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5388480A Pending JPS56149848A (en) 1980-04-23 1980-04-23 Signal transmission system

Country Status (1)

Country Link
JP (1) JPS56149848A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0205467A1 (en) * 1984-12-21 1986-12-30 Motorola, Inc. Serial link communications protocol
EP1176426A2 (en) * 2000-07-26 2002-01-30 Sumitomo Wiring Systems, Ltd. Method of checking vehicle mounted electronic units

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0205467A1 (en) * 1984-12-21 1986-12-30 Motorola, Inc. Serial link communications protocol
EP1176426A2 (en) * 2000-07-26 2002-01-30 Sumitomo Wiring Systems, Ltd. Method of checking vehicle mounted electronic units
EP1176426A3 (en) * 2000-07-26 2004-01-14 Sumitomo Wiring Systems, Ltd. Method of checking vehicle mounted electronic units

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