JPS56149470U - - Google Patents
Info
- Publication number
- JPS56149470U JPS56149470U JP4146681U JP4146681U JPS56149470U JP S56149470 U JPS56149470 U JP S56149470U JP 4146681 U JP4146681 U JP 4146681U JP 4146681 U JP4146681 U JP 4146681U JP S56149470 U JPS56149470 U JP S56149470U
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4146681U JPS56149470U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1981-03-23 | 1981-03-23 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4146681U JPS56149470U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1981-03-23 | 1981-03-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS56149470U true JPS56149470U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1981-11-10 |
Family
ID=29636853
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4146681U Pending JPS56149470U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1981-03-23 | 1981-03-23 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56149470U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5023775A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1973-06-30 | 1975-03-14 | ||
| JPS5025468B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1972-03-07 | 1975-08-23 |
-
1981
- 1981-03-23 JP JP4146681U patent/JPS56149470U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5025468B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1972-03-07 | 1975-08-23 | ||
| JPS5023775A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1973-06-30 | 1975-03-14 |