JPS5613982B2 - - Google Patents
Info
- Publication number
- JPS5613982B2 JPS5613982B2 JP8094572A JP8094572A JPS5613982B2 JP S5613982 B2 JPS5613982 B2 JP S5613982B2 JP 8094572 A JP8094572 A JP 8094572A JP 8094572 A JP8094572 A JP 8094572A JP S5613982 B2 JPS5613982 B2 JP S5613982B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Insertion, Bundling And Securing Of Wires For Electric Apparatuses (AREA)
- Details Of Resistors (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Connections Arranged To Contact A Plurality Of Conductors (AREA)
- Manufacture Of Switches (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8094572A JPS5613982B2 (en:Method) | 1972-08-12 | 1972-08-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8094572A JPS5613982B2 (en:Method) | 1972-08-12 | 1972-08-12 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS4937156A JPS4937156A (en:Method) | 1974-04-06 |
| JPS5613982B2 true JPS5613982B2 (en:Method) | 1981-04-01 |
Family
ID=13732617
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8094572A Expired JPS5613982B2 (en:Method) | 1972-08-12 | 1972-08-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5613982B2 (en:Method) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5633122Y2 (en:Method) * | 1976-10-01 | 1981-08-06 |
-
1972
- 1972-08-12 JP JP8094572A patent/JPS5613982B2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS4937156A (en:Method) | 1974-04-06 |