JPS56137722A - Noise reduction circuit - Google Patents
Noise reduction circuitInfo
- Publication number
- JPS56137722A JPS56137722A JP4107880A JP4107880A JPS56137722A JP S56137722 A JPS56137722 A JP S56137722A JP 4107880 A JP4107880 A JP 4107880A JP 4107880 A JP4107880 A JP 4107880A JP S56137722 A JPS56137722 A JP S56137722A
- Authority
- JP
- Japan
- Prior art keywords
- output
- amplifier
- adder
- signal
- filter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G9/00—Combinations of two or more types of control, e.g. gain control and tone control
- H03G9/02—Combinations of two or more types of control, e.g. gain control and tone control in untuned amplifiers
- H03G9/025—Combinations of two or more types of control, e.g. gain control and tone control in untuned amplifiers frequency-dependent volume compression or expansion, e.g. multiple-band systems
Landscapes
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
- Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
Abstract
PURPOSE:To reduce noises generated in the recording and reproduction of an audio tape recorder by rectifying and smoothing the output of the 2nd adder and by sending it as a control signal to a gain control amplifier. CONSTITUTION:Gain control amplifier 3 amplifies an input signal from input terminal 11 with the gain that corresponds to a control signal. Low-pass filter 4 permits the low-frequency component of the input signal to pass through it. The 1st adder 5 obtains the sum of the output of filter 4 and that of amplifier 3 and then sends it to output terminal 12e. High-pass filter 6 permits the high-frequency component of the input signal to pass through it. The 2nd adder 7 adds the output of filter 6 to that of amplifier 3. The output of adder 7 is rectified and smoothed by control circuit 8. Whose output signal is sent as a control signal to amplifier 3. Thus, noise modulation and overshoot can effectively be prevented.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4107880A JPS56137722A (en) | 1980-03-29 | 1980-03-29 | Noise reduction circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4107880A JPS56137722A (en) | 1980-03-29 | 1980-03-29 | Noise reduction circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56137722A true JPS56137722A (en) | 1981-10-27 |
Family
ID=12598420
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4107880A Pending JPS56137722A (en) | 1980-03-29 | 1980-03-29 | Noise reduction circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56137722A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58106907A (en) * | 1981-12-01 | 1983-06-25 | レ−・ミルトン・ドルビ | Dynamic range altering circuit system |
JPS62232206A (en) * | 1986-04-01 | 1987-10-12 | Matsushita Electric Ind Co Ltd | Limiter circuit |
-
1980
- 1980-03-29 JP JP4107880A patent/JPS56137722A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58106907A (en) * | 1981-12-01 | 1983-06-25 | レ−・ミルトン・ドルビ | Dynamic range altering circuit system |
JPS6338888B2 (en) * | 1981-12-16 | 1988-08-02 | Dolby Ray Milton | |
JPS62232206A (en) * | 1986-04-01 | 1987-10-12 | Matsushita Electric Ind Co Ltd | Limiter circuit |
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