JPS56134866A - Frame synchronizing circuit - Google Patents
Frame synchronizing circuitInfo
- Publication number
- JPS56134866A JPS56134866A JP3716280A JP3716280A JPS56134866A JP S56134866 A JPS56134866 A JP S56134866A JP 3716280 A JP3716280 A JP 3716280A JP 3716280 A JP3716280 A JP 3716280A JP S56134866 A JPS56134866 A JP S56134866A
- Authority
- JP
- Japan
- Prior art keywords
- frame
- discrimination
- stored
- pattern
- result
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0602—Systems characterised by the synchronising information used
- H04J3/0605—Special codes used as synchronising signal
- H04J3/0608—Detectors therefor, e.g. correlators, state machines
Abstract
PURPOSE:To shorten the time of synchronism recovery by providing a memory element stored with information to discriminate correlativity with a frame synchronizing code pattern at each digit position on the frame of a data string. CONSTITUTION:The output of a pattern detecting circuit, which is the result of bit-by-bit pattern discrimination, is stored in (m)-bit shift register 26. The result of pattern discrimination stored in shift register 26 is read out at the pulse position of the next frame and then compared with the detection result of pattern detecting circuit 12 and when the both agree, flip-flop 21 is reset. Therefore, the discrimination result up to the last frame stored in the shift register is collated with the detection result of the current frame for coincidence discrimination, so that the probability of artificial synchronism is lowered.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3716280A JPS56134866A (en) | 1980-03-24 | 1980-03-24 | Frame synchronizing circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3716280A JPS56134866A (en) | 1980-03-24 | 1980-03-24 | Frame synchronizing circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56134866A true JPS56134866A (en) | 1981-10-21 |
Family
ID=12489894
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3716280A Pending JPS56134866A (en) | 1980-03-24 | 1980-03-24 | Frame synchronizing circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56134866A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58225755A (en) * | 1982-06-24 | 1983-12-27 | Matsushita Electric Ind Co Ltd | Frame synchronizing device |
JPS60249442A (en) * | 1984-02-15 | 1985-12-10 | エタブリシユメント パブリツク デ デイフユ−ジヨン デイツト“テレデイフユ−ジヨン デ フランス” | Data pocket broadcasting system for mobile communication |
JPS62224139A (en) * | 1986-03-26 | 1987-10-02 | Mitsubishi Electric Corp | Frame synchronizing circuit |
-
1980
- 1980-03-24 JP JP3716280A patent/JPS56134866A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58225755A (en) * | 1982-06-24 | 1983-12-27 | Matsushita Electric Ind Co Ltd | Frame synchronizing device |
JPS60249442A (en) * | 1984-02-15 | 1985-12-10 | エタブリシユメント パブリツク デ デイフユ−ジヨン デイツト“テレデイフユ−ジヨン デ フランス” | Data pocket broadcasting system for mobile communication |
JPS62224139A (en) * | 1986-03-26 | 1987-10-02 | Mitsubishi Electric Corp | Frame synchronizing circuit |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4260878A (en) | Management system for copying machines | |
US4239151A (en) | Method and apparatus for reducing the number of rejected documents when reading bar codes | |
JPS55105900A (en) | Error correction/detection system | |
JPS57105088A (en) | Character reader | |
DE3764819D1 (en) | FRAME DECODING. | |
US3959633A (en) | Security guard recording system | |
US3391387A (en) | Character recognition system | |
US3637993A (en) | Transition code recognition system | |
JPS55124343A (en) | Clock signal extracting system | |
JPS56134866A (en) | Frame synchronizing circuit | |
US3031646A (en) | Checking circuit for digital computers | |
DK146869B (en) | APPARATUS FOR DISPLAYING INFORMATION RECORDED ON A RECORDING MEDIUM | |
JPS55150071A (en) | Card reader | |
US4028528A (en) | Code scanning system | |
JPS5631250A (en) | Synchronizing unit | |
JPS5333531A (en) | Bar code reader | |
JPS5335429A (en) | Code reader | |
JPS5580188A (en) | Linear pattern coding unit | |
JPS6470970A (en) | Skew correcting circuit | |
GB1492065A (en) | Apparatus for generating output selection signals associated with each of a plurality of information data records | |
SU840866A2 (en) | Information input device | |
SU858025A1 (en) | Device for reading-out information from punched tape | |
JPS6043556B2 (en) | character reading device | |
JPS53130933A (en) | Code reader | |
JPS6449169A (en) | Information recording and reproducing device |