JPS56112942U - - Google Patents
Info
- Publication number
- JPS56112942U JPS56112942U JP974880U JP974880U JPS56112942U JP S56112942 U JPS56112942 U JP S56112942U JP 974880 U JP974880 U JP 974880U JP 974880 U JP974880 U JP 974880U JP S56112942 U JPS56112942 U JP S56112942U
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Casings For Electric Apparatus (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP974880U JPS56112942U (en) | 1980-01-29 | 1980-01-29 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP974880U JPS56112942U (en) | 1980-01-29 | 1980-01-29 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56112942U true JPS56112942U (en) | 1981-08-31 |
Family
ID=29606385
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP974880U Pending JPS56112942U (en) | 1980-01-29 | 1980-01-29 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56112942U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2022008991A (en) * | 2016-01-13 | 2022-01-14 | テキサス インスツルメンツ インコーポレイテッド | Structure and method for packaging stress-sensitive mems |
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1980
- 1980-01-29 JP JP974880U patent/JPS56112942U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2022008991A (en) * | 2016-01-13 | 2022-01-14 | テキサス インスツルメンツ インコーポレイテッド | Structure and method for packaging stress-sensitive mems |