JPS5588112A - Information processor - Google Patents

Information processor

Info

Publication number
JPS5588112A
JPS5588112A JP15983478A JP15983478A JPS5588112A JP S5588112 A JPS5588112 A JP S5588112A JP 15983478 A JP15983478 A JP 15983478A JP 15983478 A JP15983478 A JP 15983478A JP S5588112 A JPS5588112 A JP S5588112A
Authority
JP
Japan
Prior art keywords
signal
processor
cpa
performs
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15983478A
Other languages
Japanese (ja)
Inventor
Yoshio Kakihi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP15983478A priority Critical patent/JPS5588112A/en
Publication of JPS5588112A publication Critical patent/JPS5588112A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To improve processing performance by selecting one of several oscillator outputs as a needed clock pulse (hereafter referred to as cp) according to the kind of a process that an information processor performs, and then by performing the process by using the selected clock pulse.
CONSTITUTION: While the execution of the internal processing of processor 2 is under way, the processor selects signal (k) for clock change-over circuit 12 by clock switching control signal (l) and indicates the inhibition of signal (j). As a result, since a signal of cpa is outputted for cpi, processor 2 performs its internal process using cpa while cpa is being selected by signal (k). Next, when processor 2 performs an input-output control process, processor 2 indicates the inhibition of signal (k) by selecting signal (j) for clock change-over circuit 12 by signal (l). As a result, a signal of cpd is outputted for cpi. Processor 2, therefore, uses cpd for the input-output control process.
COPYRIGHT: (C)1980,JPO&Japio
JP15983478A 1978-12-27 1978-12-27 Information processor Pending JPS5588112A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15983478A JPS5588112A (en) 1978-12-27 1978-12-27 Information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15983478A JPS5588112A (en) 1978-12-27 1978-12-27 Information processor

Publications (1)

Publication Number Publication Date
JPS5588112A true JPS5588112A (en) 1980-07-03

Family

ID=15702255

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15983478A Pending JPS5588112A (en) 1978-12-27 1978-12-27 Information processor

Country Status (1)

Country Link
JP (1) JPS5588112A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62250580A (en) * 1986-04-23 1987-10-31 Nec Corp Memory controller
JPS63193234A (en) * 1987-02-06 1988-08-10 Canon Inc Instrument control equipment
JPH01293471A (en) * 1988-05-20 1989-11-27 Fujitsu Ltd Element purging system for circuit drawing conversion
JPH05204634A (en) * 1991-08-29 1993-08-13 Internatl Business Mach Corp <Ibm> Microprocessor circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62250580A (en) * 1986-04-23 1987-10-31 Nec Corp Memory controller
JPS63193234A (en) * 1987-02-06 1988-08-10 Canon Inc Instrument control equipment
JPH01293471A (en) * 1988-05-20 1989-11-27 Fujitsu Ltd Element purging system for circuit drawing conversion
JPH05204634A (en) * 1991-08-29 1993-08-13 Internatl Business Mach Corp <Ibm> Microprocessor circuit

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