JPS5571042A - Semiconductor package and method of manufacturing same - Google Patents

Semiconductor package and method of manufacturing same

Info

Publication number
JPS5571042A
JPS5571042A JP14530579A JP14530579A JPS5571042A JP S5571042 A JPS5571042 A JP S5571042A JP 14530579 A JP14530579 A JP 14530579A JP 14530579 A JP14530579 A JP 14530579A JP S5571042 A JPS5571042 A JP S5571042A
Authority
JP
Japan
Prior art keywords
semiconductor package
manufacturing same
manufacturing
same
package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14530579A
Other languages
Japanese (ja)
Inventor
Dan Izumi Biteki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Maruman Integrated Circuits Inc
Original Assignee
Maruman Integrated Circuits Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Maruman Integrated Circuits Inc filed Critical Maruman Integrated Circuits Inc
Publication of JPS5571042A publication Critical patent/JPS5571042A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/147—Semiconductor insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP14530579A 1978-11-09 1979-11-09 Semiconductor package and method of manufacturing same Pending JPS5571042A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US95923578A 1978-11-09 1978-11-09

Publications (1)

Publication Number Publication Date
JPS5571042A true JPS5571042A (en) 1980-05-28

Family

ID=25501810

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14530579A Pending JPS5571042A (en) 1978-11-09 1979-11-09 Semiconductor package and method of manufacturing same

Country Status (2)

Country Link
JP (1) JPS5571042A (en)
DE (1) DE2945385A1 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4541035A (en) * 1984-07-30 1985-09-10 General Electric Company Low loss, multilevel silicon circuit board
US4705606A (en) * 1985-01-31 1987-11-10 Gould Inc. Thin-film electrical connections for integrated circuits
US4996584A (en) * 1985-01-31 1991-02-26 Gould, Inc. Thin-film electrical connections for integrated circuits
US5182420A (en) * 1989-04-25 1993-01-26 Cray Research, Inc. Method of fabricating metallized chip carriers from wafer-shaped substrates
US5196377A (en) * 1990-12-20 1993-03-23 Cray Research, Inc. Method of fabricating silicon-based carriers
FR2814279B1 (en) * 2000-09-15 2003-02-28 Alstom SUBSTRATE FOR ELECTRONIC CIRCUIT AND ELECTRONIC MODULE USING SUCH SUBSTRATE
DE102015015699A1 (en) * 2015-12-04 2017-06-08 Abb Schweiz Ag Electronic power module

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4828185A (en) * 1971-08-18 1973-04-13

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4828185A (en) * 1971-08-18 1973-04-13

Also Published As

Publication number Publication date
DE2945385A1 (en) 1980-05-14

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