JPS5557177A - Digital timer - Google Patents

Digital timer

Info

Publication number
JPS5557177A
JPS5557177A JP13031178A JP13031178A JPS5557177A JP S5557177 A JPS5557177 A JP S5557177A JP 13031178 A JP13031178 A JP 13031178A JP 13031178 A JP13031178 A JP 13031178A JP S5557177 A JPS5557177 A JP S5557177A
Authority
JP
Japan
Prior art keywords
circuit
time
setting
counters
counting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13031178A
Other languages
Japanese (ja)
Inventor
Takehiro Ishikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP13031178A priority Critical patent/JPS5557177A/en
Publication of JPS5557177A publication Critical patent/JPS5557177A/en
Pending legal-status Critical Current

Links

Landscapes

  • Measurement Of Predetermined Time Intervals (AREA)

Abstract

PURPOSE: To increase the field of application for the digital timer by delivering the alarm tone at the time-up detection time and at the same time counting and displaying the time-up number.
CONSTITUTION: When the setting is over for all timer time of the hour, minute and second each, the output of shift register 13 and NOR circuit 24 feature the levels of "0" and "1" each. And setting end signal is applied to preset circuits 7W9 via OR circuit 31. Thus the setting time information is teransferred to down-counters 10W 12. Then F/F26 is set via AND circuit 19 when switch 28 is turned on, and output Q of level "1" opens AND circuit 17 to make the counter start the down-counting. When all counters feature zero, zero detection circuit 30 operates to make AND circuit 18 drive the sound generation device via NOR circuit 23. At the same time, circuit 31 operates to preset the setting time information to counters 7W9 as well as to make repeat counter 6 carry out the up-counting. Thus the set time and the repeat frequency can be known.
COPYRIGHT: (C)1980,JPO&Japio
JP13031178A 1978-10-23 1978-10-23 Digital timer Pending JPS5557177A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13031178A JPS5557177A (en) 1978-10-23 1978-10-23 Digital timer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13031178A JPS5557177A (en) 1978-10-23 1978-10-23 Digital timer

Publications (1)

Publication Number Publication Date
JPS5557177A true JPS5557177A (en) 1980-04-26

Family

ID=15031280

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13031178A Pending JPS5557177A (en) 1978-10-23 1978-10-23 Digital timer

Country Status (1)

Country Link
JP (1) JPS5557177A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5782787A (en) * 1980-11-11 1982-05-24 Seiko Epson Corp Real time clock

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53144377A (en) * 1977-05-20 1978-12-15 Sharp Corp Repeating timer

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53144377A (en) * 1977-05-20 1978-12-15 Sharp Corp Repeating timer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5782787A (en) * 1980-11-11 1982-05-24 Seiko Epson Corp Real time clock
JPS6360873B2 (en) * 1980-11-11 1988-11-25

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